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2b4ffbf6b4
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. The upstream code is incorporated omitting the ddr4 and apn806 and folding the nested a38x directory up one level. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE. Some now empty files are removed and the ternary license is replaced with a SPDX GPL-2.0+ identifier. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
17 lines
435 B
C
17 lines
435 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#ifndef _DDR3_TRAINING_LEVELING_H_
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#define _DDR3_TRAINING_LEVELING_H_
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#define MAX_DQ_READ_LEVELING_DELAY 15
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int ddr3_tip_print_wl_supp_result(u32 dev_num);
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int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs,
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u32 *cs_mask);
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u32 ddr3_tip_max_cs_get(u32 dev_num);
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#endif /* _DDR3_TRAINING_LEVELING_H_ */
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