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https://github.com/brain-hackers/u-boot-brain
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c4068dfb31
Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
31 lines
955 B
Plaintext
31 lines
955 B
Plaintext
config PINCTRL_IMX
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bool
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config PINCTRL_IMX6
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bool "IMX6 pinctrl driver"
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depends on ARCH_MX6 && PINCTRL_FULL
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select DEVRES
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select PINCTRL_IMX
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help
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Say Y here to enable the imx6 pinctrl driver
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This provides a simple pinctrl driver for i.MX6 SoC familiy,
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i.MX6DQ/SL/SX/UL/DQP. This feature depends on device tree
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configuration. This driver is different from the linux one,
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this is a simple implementation, only parses the 'fsl,pins'
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property and configure related registers.
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config PINCTRL_IMX7
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bool "IMX7 pinctrl driver"
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depends on ARCH_MX7 && PINCTRL_FULL
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select DEVRES
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select PINCTRL_IMX
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help
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Say Y here to enable the imx7 pinctrl driver
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This provides a simple pinctrl driver for i.MX7 SoC familiy,
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i.MX7D. This feature depends on device tree
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configuration. This driver is different from the linux one,
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this is a simple implementation, only parses the 'fsl,pins'
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property and configure related registers.
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