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![Claudiu Beznea](/assets/img/avatar_default.png)
Add generic clock ops to be used by every AT91 PMC driver built on top of CCF. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
171 lines
3.3 KiB
C
171 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#include <asm/io.h>
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#include <clk-uclass.h>
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#include <common.h>
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#include "pmc.h"
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static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
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{
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if (args->args_count != 2) {
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debug("AT91: clk: Invalid args_count: %d\n", args->args_count);
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return -EINVAL;
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}
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clk->id = AT91_TO_CLK_ID(args->args[0], args->args[1]);
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return 0;
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}
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static ulong at91_clk_get_rate(struct clk *clk)
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{
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struct clk *c;
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int ret;
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ret = clk_get_by_id(clk->id, &c);
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if (ret)
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return ret;
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return clk_get_rate(c);
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}
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static ulong at91_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct clk *c;
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int ret;
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ret = clk_get_by_id(clk->id, &c);
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if (ret)
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return ret;
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return clk_set_rate(c, rate);
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}
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static int at91_clk_enable(struct clk *clk)
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{
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struct clk *c;
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int ret;
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ret = clk_get_by_id(clk->id, &c);
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if (ret)
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return ret;
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return clk_enable(c);
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}
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static int at91_clk_disable(struct clk *clk)
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{
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struct clk *c;
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int ret;
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ret = clk_get_by_id(clk->id, &c);
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if (ret)
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return ret;
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return clk_disable(c);
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}
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const struct clk_ops at91_clk_ops = {
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.of_xlate = at91_clk_of_xlate,
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.set_rate = at91_clk_set_rate,
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.get_rate = at91_clk_get_rate,
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.enable = at91_clk_enable,
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.disable = at91_clk_disable,
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};
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/**
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* pmc_read() - read content at address base + off into val
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*
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* @base: base address
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* @off: offset to read from
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* @val: where the content of base + off is stored
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*
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* @return: void
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*/
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void pmc_read(void __iomem *base, unsigned int off, unsigned int *val)
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{
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*val = readl(base + off);
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}
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/**
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* pmc_write() - write content of val at address base + off
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*
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* @base: base address
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* @off: offset to write to
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* @val: content to be written at base + off
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*
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* @return: void
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*/
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void pmc_write(void __iomem *base, unsigned int off, unsigned int val)
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{
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writel(val, base + off);
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}
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/**
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* pmc_update_bits() - update a set of bits at address base + off
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*
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* @base: base address
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* @off: offset to be updated
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* @mask: mask of bits to be updated
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* @bits: the new value to be updated
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*
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* @return: void
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*/
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void pmc_update_bits(void __iomem *base, unsigned int off,
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unsigned int mask, unsigned int bits)
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{
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unsigned int tmp;
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tmp = readl(base + off);
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tmp &= ~mask;
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writel(tmp | (bits & mask), base + off);
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}
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/**
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* at91_clk_mux_val_to_index() - get parent index in mux table
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*
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* @table: clock mux table
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* @num_parents: clock number of parents
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* @val: clock id who's mux index should be retrieved
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*
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* @return: clock index in mux table or a negative error number in case of
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* failure
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*/
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int at91_clk_mux_val_to_index(const u32 *table, u32 num_parents, u32 val)
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{
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int i;
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if (!table || !num_parents)
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return -EINVAL;
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for (i = 0; i < num_parents; i++) {
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if (table[i] == val)
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return i;
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}
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return -EINVAL;
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}
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/**
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* at91_clk_mux_index_to_val() - get parent ID corresponding to an entry in
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* clock's mux table
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*
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* @table: clock's mux table
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* @num_parents: clock's number of parents
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* @index: index in mux table which clock's ID should be retrieved
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*
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* @return: clock ID or a negative error number in case of failure
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*/
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int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index)
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{
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if (!table || !num_parents || index < 0 || index > num_parents)
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return -EINVAL;
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return table[index];
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}
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