mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
461 lines
12 KiB
C
461 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* Adapted from coreboot src/arch/x86/include/arch/smp/mpspec.h
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*/
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#ifndef __ASM_MPSPEC_H
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#define __ASM_MPSPEC_H
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/*
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* Structure definitions for SMP machines following the
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* Intel MultiProcessor Specification 1.4
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*/
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#define MPSPEC_V14 4
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#define MPF_SIGNATURE "_MP_"
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struct mp_floating_table {
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char mpf_signature[4]; /* "_MP_" */
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u32 mpf_physptr; /* Configuration table address */
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u8 mpf_length; /* Our length (paragraphs) */
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u8 mpf_spec; /* Specification version */
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u8 mpf_checksum; /* Checksum (makes sum 0) */
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u8 mpf_feature1; /* Predefined or Unique configuration? */
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u8 mpf_feature2; /* Bit7 set for IMCR/PIC */
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u8 mpf_feature3; /* Unused (0) */
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u8 mpf_feature4; /* Unused (0) */
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u8 mpf_feature5; /* Unused (0) */
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};
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#define MPC_SIGNATURE "PCMP"
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struct mp_config_table {
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char mpc_signature[4]; /* "PCMP" */
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u16 mpc_length; /* Size of table */
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u8 mpc_spec; /* Specification version */
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u8 mpc_checksum; /* Checksum (makes sum 0) */
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char mpc_oem[8]; /* OEM ID */
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char mpc_product[12]; /* Product ID */
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u32 mpc_oemptr; /* OEM table address */
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u16 mpc_oemsize; /* OEM table size */
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u16 mpc_entry_count; /* Number of entries in the table */
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u32 mpc_lapic; /* Local APIC address */
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u16 mpe_length; /* Extended table size */
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u8 mpe_checksum; /* Extended table checksum */
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u8 reserved;
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};
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/* Base MP configuration table entry types */
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enum mp_base_config_entry_type {
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MP_PROCESSOR,
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MP_BUS,
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MP_IOAPIC,
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MP_INTSRC,
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MP_LINTSRC
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};
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#define MPC_CPU_EN (1 << 0)
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#define MPC_CPU_BP (1 << 1)
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struct mpc_config_processor {
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u8 mpc_type;
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u8 mpc_apicid;
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u8 mpc_apicver;
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u8 mpc_cpuflag;
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u32 mpc_cpusignature;
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u32 mpc_cpufeature;
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u32 mpc_reserved[2];
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};
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#define BUSTYPE_CBUS "CBUS "
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#define BUSTYPE_CBUSII "CBUSII"
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#define BUSTYPE_EISA "EISA "
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#define BUSTYPE_FUTURE "FUTURE"
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#define BUSTYPE_INTERN "INTERN"
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#define BUSTYPE_ISA "ISA "
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#define BUSTYPE_MBI "MBI "
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#define BUSTYPE_MBII "MBII "
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#define BUSTYPE_MCA "MCA "
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#define BUSTYPE_MPI "MPI "
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#define BUSTYPE_MPSA "MPSA "
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#define BUSTYPE_NUBUS "NUBUS "
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#define BUSTYPE_PCI "PCI "
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#define BUSTYPE_PCMCIA "PCMCIA"
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#define BUSTYPE_TC "TC "
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#define BUSTYPE_VL "VL "
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#define BUSTYPE_VME "VME "
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#define BUSTYPE_XPRESS "XPRESS"
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struct mpc_config_bus {
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u8 mpc_type;
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u8 mpc_busid;
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u8 mpc_bustype[6];
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};
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#define MPC_APIC_USABLE (1 << 0)
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struct mpc_config_ioapic {
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u8 mpc_type;
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u8 mpc_apicid;
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u8 mpc_apicver;
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u8 mpc_flags;
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u32 mpc_apicaddr;
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};
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enum mp_irq_source_types {
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MP_INT,
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MP_NMI,
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MP_SMI,
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MP_EXTINT
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};
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#define MP_IRQ_POLARITY_DEFAULT 0x0
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#define MP_IRQ_POLARITY_HIGH 0x1
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#define MP_IRQ_POLARITY_LOW 0x3
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#define MP_IRQ_POLARITY_MASK 0x3
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#define MP_IRQ_TRIGGER_DEFAULT 0x0
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#define MP_IRQ_TRIGGER_EDGE 0x4
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#define MP_IRQ_TRIGGER_LEVEL 0xc
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#define MP_IRQ_TRIGGER_MASK 0xc
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#define MP_APIC_ALL 0xff
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struct mpc_config_intsrc {
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u8 mpc_type;
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u8 mpc_irqtype;
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u16 mpc_irqflag;
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u8 mpc_srcbus;
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u8 mpc_srcbusirq;
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u8 mpc_dstapic;
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u8 mpc_dstirq;
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};
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struct mpc_config_lintsrc {
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u8 mpc_type;
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u8 mpc_irqtype;
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u16 mpc_irqflag;
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u8 mpc_srcbusid;
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u8 mpc_srcbusirq;
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u8 mpc_destapic;
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u8 mpc_destlint;
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};
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/* Extended MP configuration table entry types */
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enum mp_ext_config_entry_type {
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MPE_SYSTEM_ADDRESS_SPACE = 128,
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MPE_BUS_HIERARCHY,
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MPE_COMPAT_ADDRESS_SPACE
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};
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struct mp_ext_config {
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u8 mpe_type;
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u8 mpe_length;
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};
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#define ADDRESS_TYPE_IO 0
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#define ADDRESS_TYPE_MEM 1
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#define ADDRESS_TYPE_PREFETCH 2
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struct mp_ext_system_address_space {
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u8 mpe_type;
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u8 mpe_length;
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u8 mpe_busid;
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u8 mpe_addr_type;
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u32 mpe_addr_base_low;
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u32 mpe_addr_base_high;
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u32 mpe_addr_length_low;
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u32 mpe_addr_length_high;
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};
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#define BUS_SUBTRACTIVE_DECODE (1 << 0)
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struct mp_ext_bus_hierarchy {
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u8 mpe_type;
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u8 mpe_length;
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u8 mpe_busid;
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u8 mpe_bus_info;
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u8 mpe_parent_busid;
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u8 reserved[3];
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};
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#define ADDRESS_RANGE_ADD 0
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#define ADDRESS_RANGE_SUBTRACT 1
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/*
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* X100 - X3FF
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* X500 - X7FF
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* X900 - XBFF
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* XD00 - XFFF
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*/
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#define RANGE_LIST_IO_ISA 0
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/*
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* X3B0 - X3BB
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* X3C0 - X3DF
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* X7B0 - X7BB
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* X7C0 - X7DF
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* XBB0 - XBBB
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* XBC0 - XBDF
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* XFB0 - XFBB
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* XFC0 - XCDF
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*/
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#define RANGE_LIST_IO_VGA 1
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struct mp_ext_compat_address_space {
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u8 mpe_type;
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u8 mpe_length;
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u8 mpe_busid;
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u8 mpe_addr_modifier;
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u32 mpe_range_list;
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};
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/**
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* mp_next_mpc_entry() - Compute MP configuration table end to be used as
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* next base table entry start address
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*
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* This computes the end address of current MP configuration table, without
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* counting any extended configuration table entry.
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*
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* @mc: configuration table header address
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* @return: configuration table end address
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*/
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static inline ulong mp_next_mpc_entry(struct mp_config_table *mc)
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{
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return (ulong)mc + mc->mpc_length;
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}
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/**
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* mp_add_mpc_entry() - Add a base MP configuration table entry
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*
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* This adds the base MP configuration table entry size with
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* added base table entry length and increases entry count by 1.
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*
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* @mc: configuration table header address
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* @length: length of the added table entry
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*/
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static inline void mp_add_mpc_entry(struct mp_config_table *mc, uint length)
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{
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mc->mpc_length += length;
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mc->mpc_entry_count++;
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}
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/**
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* mp_next_mpe_entry() - Compute MP configuration table end to be used as
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* next extended table entry start address
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*
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* This computes the end address of current MP configuration table,
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* including any extended configuration table entry.
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*
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* @mc: configuration table header address
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* @return: configuration table end address
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*/
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static inline ulong mp_next_mpe_entry(struct mp_config_table *mc)
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{
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return (ulong)mc + mc->mpc_length + mc->mpe_length;
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}
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/**
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* mp_add_mpe_entry() - Add an extended MP configuration table entry
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*
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* This adds the extended MP configuration table entry size with
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* added extended table entry length.
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*
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* @mc: configuration table header address
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* @mpe: extended table entry base address
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*/
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static inline void mp_add_mpe_entry(struct mp_config_table *mc,
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struct mp_ext_config *mpe)
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{
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mc->mpe_length += mpe->mpe_length;
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}
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/**
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* mp_write_floating_table() - Write the MP floating table
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*
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* This writes the MP floating table, and points MP configuration table
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* to its end address so that MP configuration table follows immediately
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* after the floating table.
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*
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* @mf: MP floating table base address
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* @return: MP configuration table header address
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*/
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struct mp_config_table *mp_write_floating_table(struct mp_floating_table *mf);
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/**
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* mp_config_table_init() - Initialize the MP configuration table header
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*
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* This populates the MP configuration table header with valid bits.
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*
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* @mc: MP configuration table header address
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*/
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void mp_config_table_init(struct mp_config_table *mc);
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/**
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* mp_write_processor() - Write a processor entry
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*
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* This writes a processor entry to the configuration table.
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*
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* @mc: MP configuration table header address
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*/
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void mp_write_processor(struct mp_config_table *mc);
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/**
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* mp_write_bus() - Write a bus entry
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*
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* This writes a bus entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @id: bus id
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* @bustype: bus type name
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*/
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void mp_write_bus(struct mp_config_table *mc, int id, const char *bustype);
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/**
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* mp_write_ioapic() - Write an I/O APIC entry
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*
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* This writes an I/O APIC entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @id: I/O APIC id
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* @ver: I/O APIC version
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* @apicaddr: I/O APIC address
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*/
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void mp_write_ioapic(struct mp_config_table *mc, int id, int ver, u32 apicaddr);
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/**
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* mp_write_intsrc() - Write an I/O interrupt assignment entry
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*
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* This writes an I/O interrupt assignment entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @irqtype: IRQ type (INT/NMI/SMI/ExtINT)
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* @irqflag: IRQ flag (level/trigger)
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* @srcbus: source bus id where the interrupt comes from
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* @srcbusirq: IRQ number mapped on the source bus
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* @dstapic: destination I/O APIC id where the interrupt goes to
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* @dstirq: destination I/O APIC pin where the interrupt goes to
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*/
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void mp_write_intsrc(struct mp_config_table *mc, int irqtype, int irqflag,
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int srcbus, int srcbusirq, int dstapic, int dstirq);
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/**
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* mp_write_pci_intsrc() - Write a PCI interrupt assignment entry
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*
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* This writes a PCI interrupt assignment entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @irqtype: IRQ type (INT/NMI/SMI/ExtINT)
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* @srcbus: PCI bus number where the interrupt comes from
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* @dev: device number on the PCI bus
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* @pin: PCI interrupt pin (INT A/B/C/D)
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* @dstapic: destination I/O APIC id where the interrupt goes to
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* @dstirq: destination I/O APIC pin where the interrupt goes to
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*/
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void mp_write_pci_intsrc(struct mp_config_table *mc, int irqtype,
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int srcbus, int dev, int pin, int dstapic, int dstirq);
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/**
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* mp_write_lintsrc() - Write a local interrupt assignment entry
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*
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* This writes a local interrupt assignment entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @irqtype: IRQ type (INT/NMI/SMI/ExtINT)
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* @irqflag: IRQ flag (level/trigger)
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* @srcbus: PCI bus number where the interrupt comes from
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* @srcbusirq: IRQ number mapped on the source bus
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* @dstapic: destination local APIC id where the interrupt goes to
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* @destlint: destination local APIC pin where the interrupt goes to
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*/
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void mp_write_lintsrc(struct mp_config_table *mc, int irqtype, int irqflag,
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int srcbus, int srcbusirq, int destapic, int destlint);
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/**
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* mp_write_address_space() - Write a system address space entry
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*
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* This writes a system address space entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @busid: bus id for the bus where system address space is mapped
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* @addr_type: system address type
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* @addr_base_low: starting address low
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* @addr_base_high: starting address high
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* @addr_length_low: address length low
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* @addr_length_high: address length high
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*/
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void mp_write_address_space(struct mp_config_table *mc,
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int busid, int addr_type,
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u32 addr_base_low, u32 addr_base_high,
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u32 addr_length_low, u32 addr_length_high);
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/**
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* mp_write_bus_hierarchy() - Write a bus hierarchy descriptor entry
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*
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* This writes a bus hierarchy descriptor entry to the configuration table.
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*
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* @mc: MP configuration table header address
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* @busid: bus id
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* @bus_info: bit0 indicates if the bus is a subtractive decode bus
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* @parent_busid: parent bus id
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*/
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void mp_write_bus_hierarchy(struct mp_config_table *mc,
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int busid, int bus_info, int parent_busid);
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/**
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* mp_write_compat_address_space() - Write a compat bus address space entry
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*
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* This writes a compatibility bus address space modifier entry to the
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* configuration table.
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*
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* @mc: MP configuration table header address
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* @busid: bus id
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* @addr_modifier: add or subtract to predefined address range list
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* @range_list: list of predefined address space ranges
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*/
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void mp_write_compat_address_space(struct mp_config_table *mc, int busid,
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int addr_modifier, u32 range_list);
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/**
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* mptable_finalize() - Finalize the MP table
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*
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* This finalizes the MP table by calculating required checksums.
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*
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* @mc: MP configuration table header address
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* @return: MP table end address
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*/
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u32 mptable_finalize(struct mp_config_table *mc);
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/**
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* mp_determine_pci_dstirq() - Determine PCI device's int pin on the I/O APIC
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*
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* This determines a PCI device's interrupt pin number on the I/O APIC.
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*
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* This can be implemented by platform codes to handle specifal cases, which
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* do not conform to the normal chipset/board design where PIRQ[A-H] are mapped
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* directly to I/O APIC INTPIN#16-23.
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*
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* @bus: bus number of the pci device
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* @dev: device number of the pci device
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* @func: function number of the pci device
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* @pirq: PIRQ number the PCI device's interrupt pin is routed to
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* @return: interrupt pin number on the I/O APIC
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*/
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int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq);
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/**
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* write_mp_table() - Write MP table
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*
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* This writes MP table at a given address.
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*
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* @addr: start address to write MP table
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* @return: end address of MP table
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*/
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ulong write_mp_table(ulong addr);
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#endif /* __ASM_MPSPEC_H */
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