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https://github.com/brain-hackers/u-boot-brain
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39419ce589
This driver only provides initialization code; actual driving is done by cmd_ide.c using the ATA compatibility mode of the Marvell SATAHC controller. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
141 lines
4.3 KiB
C
141 lines
4.3 KiB
C
/*
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* Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
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*
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* Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#if defined(CONFIG_ORION5X)
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#include <asm/arch/orion5x.h>
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#elif defined(CONFIG_KIRKWOOD)
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#include <asm/arch/kirkwood.h>
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#endif
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/* SATA port registers */
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struct mvsata_port_registers {
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u32 reserved1[192];
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/* offset 0x300 : ATA Interface registers */
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u32 sstatus;
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u32 serror;
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u32 scontrol;
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u32 ltmode;
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u32 phymode3;
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u32 phymode4;
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u32 reserved2[5];
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u32 phymode1;
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u32 phymode2;
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u32 bist_cr;
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u32 bist_dw1;
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u32 bist_dw2;
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u32 serrorintrmask;
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};
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/*
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* Sanity checks:
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* - to compile at all, we need CONFIG_SYS_ATA_BASE_ADDR.
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* - for ide_preinit to make sense, we need at least one of
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* CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE0_OFFSET;
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* - for inde_preinit to be called, we need CONFIG_IDE_PREINIT.
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* Fail with an explanation message if these conditions are not met.
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* This is particularly important for CONFIG_IDE_PREINIT, because
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* its lack would not cause a build error.
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*/
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#if !defined(CONFIG_SYS_ATA_BASE_ADDR)
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#error CONFIG_SYS_ATA_BASE_ADDR must be defined
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#elif !defined(CONFIG_SYS_ATA_IDE0_OFFSET) \
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&& !defined(CONFIG_SYS_ATA_IDE1_OFFSET)
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#error CONFIG_SYS_ATA_IDE0_OFFSET or CONFIG_SYS_ATA_IDE1_OFFSET \
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must be defined
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#elif !defined(CONFIG_IDE_PREINIT)
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#error CONFIG_IDE_PREINIT must be defined
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#endif
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/*
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* Masks and values for SControl DETection and Interface Power Management,
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* and for SStatus DETection.
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*/
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#define MVSATA_SCONTROL_DET_MASK 0x0000000F
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#define MVSATA_SCONTROL_DET_NONE 0x00000000
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#define MVSATA_SCONTROL_DET_INIT 0x00000001
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#define MVSATA_SCONTROL_IPM_MASK 0x00000F00
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#define MVSATA_SCONTROL_IPM_NO_LP_ALLOWED 0x00000300
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#define MVSATA_SCONTROL_MASK \
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(MVSATA_SCONTROL_DET_MASK|MVSATA_SCONTROL_IPM_MASK)
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#define MVSATA_PORT_INIT \
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(MVSATA_SCONTROL_DET_INIT|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
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#define MVSATA_PORT_USE \
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(MVSATA_SCONTROL_DET_NONE|MVSATA_SCONTROL_IPM_NO_LP_ALLOWED)
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#define MVSATA_SSTATUS_DET_MASK 0x0000000F
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#define MVSATA_SSTATUS_DET_DEVCOMM 0x00000003
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/*
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* Initialize one MVSATAHC port: set SControl's IPM to "always active"
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* and DET to "reset", then wait for SStatus's DET to become "device and
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* comm ok" (or time out after 50 us if no device), then set SControl's
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* DET back to "no action".
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*/
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static void mvsata_ide_initialize_port(struct mvsata_port_registers *port)
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{
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u32 control;
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u32 status;
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u32 tout = 50; /* wait at most 50 us for SATA reset to complete */
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control = readl(&port->scontrol);
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control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;
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writel(control, &port->scontrol);
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while (--tout) {
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status = readl(&port->sstatus) & MVSATA_SSTATUS_DET_MASK;
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if (status == MVSATA_SSTATUS_DET_DEVCOMM)
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break;
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udelay(1);
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}
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control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_USE;
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writel(control, &port->scontrol);
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}
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/*
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* ide_preinit() will be called by ide_init in cmd_ide.c and will
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* reset the MVSTATHC ports needed by the board.
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*/
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int ide_preinit(void)
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{
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/* Enable ATA port 0 (could be SATA port 0 or 1) if declared */
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#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
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mvsata_ide_initialize_port(
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(struct mvsata_port_registers *)
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(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE0_OFFSET));
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#endif
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/* Enable ATA port 1 (could be SATA port 0 or 1) if declared */
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#if defined(CONFIG_SYS_ATA_IDE1_OFFSET)
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mvsata_ide_initialize_port(
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(struct mvsata_port_registers *)
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(CONFIG_SYS_ATA_BASE_ADDR + CONFIG_SYS_ATA_IDE1_OFFSET));
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#endif
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/* return 0 as we always succeed */
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return 0;
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}
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