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https://github.com/brain-hackers/u-boot-brain
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65c8a79811
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/reset/reset-ti-sci.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
110 lines
3.6 KiB
Plaintext
110 lines
3.6 KiB
Plaintext
menu "Reset Controller Support"
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config DM_RESET
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bool "Enable reset controllers using Driver Model"
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depends on DM && OF_CONTROL
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help
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Enable support for the reset controller driver class. Many hardware
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modules are equipped with a reset signal, typically driven by some
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reset controller hardware module within the chip. In U-Boot, reset
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controller drivers allow control over these reset signals. In some
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cases this API is applicable to chips outside the CPU as well,
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although driving such reset isgnals using GPIOs may be more
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appropriate in this case.
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config SANDBOX_RESET
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bool "Enable the sandbox reset test driver"
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depends on DM_MAILBOX && SANDBOX
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help
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Enable support for a test reset controller implementation, which
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simply accepts requests to reset various HW modules without actually
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doing anything beyond a little error checking.
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config STI_RESET
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bool "Enable the STi reset"
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depends on ARCH_STI
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help
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Support for reset controllers on STMicroelectronics STiH407 family SoCs.
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Say Y if you want to control reset signals provided by system config
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block.
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config STM32_RESET
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bool "Enable the STM32 reset"
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depends on STM32 || ARCH_STM32MP
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help
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Support for reset controllers on STMicroelectronics STM32 family SoCs.
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This resset driver is compatible with STM32 F4/F7 and H7 SoCs.
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config TEGRA_CAR_RESET
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bool "Enable Tegra CAR-based reset driver"
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depends on TEGRA_CAR
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help
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Enable support for manipulating Tegra's on-SoC reset signals via
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direct register access to the Tegra CAR (Clock And Reset controller).
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config TEGRA186_RESET
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bool "Enable Tegra186 BPMP-based reset driver"
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depends on TEGRA186_BPMP
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help
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Enable support for manipulating Tegra's on-SoC reset signals via IPC
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requests to the BPMP (Boot and Power Management Processor).
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config RESET_TI_SCI
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bool "TI System Control Interface (TI SCI) reset driver"
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depends on DM_RESET && TI_SCI_PROTOCOL
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_BCM6345
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bool "Reset controller driver for BCM6345"
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depends on DM_RESET && ARCH_BMIPS
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help
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Support reset controller on BCM6345.
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config RESET_UNIPHIER
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bool "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER
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default y
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config AST2500_RESET
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bool "Reset controller driver for AST2500 SoCs"
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depends on DM_RESET && WDT_ASPEED
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default y if ASPEED_AST2500
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help
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Support for reset controller on AST2500 SoC. This controller uses
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watchdog to reset different peripherals and thus only supports
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resets that are supported by watchdog. The main limitation though
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is that some reset signals, like I2C or MISC reset multiple devices.
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config RESET_ROCKCHIP
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bool "Reset controller driver for Rockchip SoCs"
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depends on DM_RESET && ARCH_ROCKCHIP && CLK
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default y
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help
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Support for reset controller on rockchip SoC. The main limitation
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though is that some reset signals, like I2C or MISC reset multiple
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devices.
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config RESET_MESON
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bool "Reset controller driver for Amlogic Meson SoCs"
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depends on DM_RESET && ARCH_MESON
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imply REGMAP
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default y
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help
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Support for reset controller on Amlogic Meson SoC.
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config RESET_SOCFPGA
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bool "Reset controller driver for SoCFPGA"
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depends on DM_RESET && ARCH_SOCFPGA
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default y
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help
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Support for reset controller on SoCFPGA platform.
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endmenu
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