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https://github.com/brain-hackers/u-boot-brain
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![Sven Ebenfeld](/assets/img/avatar_default.png)
When using HAB as secure boot mechanism on Wandboard, the chain of trust breaks immediately after the SPL. As this is not checking the authenticity of the loaded image before jumping to it. The HAB status output will not be implemented in SPL as it adds a lot of strings that are only required in debug cases. With those it exceeds the maximum size of the available OCRAM (69 KiB). The SPL MISC driver support must be enabled, so that the driver can use OTP fuse to check if HAB is enabled. Cc: sbabic@denx.de v2-Changes: None Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
118 lines
2.9 KiB
C
118 lines
2.9 KiB
C
/*
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* Copyright (C) 2014 Gateworks Corporation
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* Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
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*
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* Author: Tim Harvey <tharvey@gateworks.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/spl.h>
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#include <spl.h>
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#include <asm/imx-common/hab.h>
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#if defined(CONFIG_MX6)
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/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
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u32 spl_boot_device(void)
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{
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
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unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
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unsigned int bmode = readl(&psrc->sbmr2);
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/*
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* Check for BMODE if serial downloader is enabled
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* BOOT_MODE - see IMX6DQRM Table 8-1
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*/
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if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */
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(gpr10_boot && (reg == 1)))
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return BOOT_DEVICE_UART;
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/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
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switch ((reg & 0x000000FF) >> 4) {
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/* EIM: See 8.5.1, Table 8-9 */
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case 0x0:
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/* BOOT_CFG1[3]: NOR/OneNAND Selection */
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if ((reg & 0x00000008) >> 3)
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return BOOT_DEVICE_ONENAND;
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else
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return BOOT_DEVICE_NOR;
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break;
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/* SATA: See 8.5.4, Table 8-20 */
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case 0x2:
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return BOOT_DEVICE_SATA;
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/* Serial ROM: See 8.5.5.1, Table 8-22 */
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case 0x3:
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/* BOOT_CFG4[2:0] */
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switch ((reg & 0x07000000) >> 24) {
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case 0x0 ... 0x4:
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return BOOT_DEVICE_SPI;
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case 0x5 ... 0x7:
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return BOOT_DEVICE_I2C;
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}
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break;
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/* SD/eSD: 8.5.3, Table 8-15 */
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case 0x4:
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case 0x5:
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return BOOT_DEVICE_MMC1;
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/* MMC/eMMC: 8.5.3 */
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case 0x6:
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case 0x7:
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return BOOT_DEVICE_MMC1;
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/* NAND Flash: 8.5.2 */
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case 0x8 ... 0xf:
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return BOOT_DEVICE_NAND;
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}
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return BOOT_DEVICE_NONE;
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}
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#endif
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#if defined(CONFIG_SPL_MMC_SUPPORT)
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/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
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u32 spl_boot_mode(const u32 boot_device)
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{
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switch (spl_boot_device()) {
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/* for MMC return either RAW or FAT mode */
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case BOOT_DEVICE_MMC1:
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case BOOT_DEVICE_MMC2:
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#if defined(CONFIG_SPL_FAT_SUPPORT)
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return MMCSD_MODE_FS;
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#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
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return MMCSD_MODE_EMMCBOOT;
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#else
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return MMCSD_MODE_RAW;
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#endif
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break;
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default:
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puts("spl: ERROR: unsupported device\n");
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hang();
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}
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}
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#endif
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#if defined(CONFIG_SECURE_BOOT)
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__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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typedef void __noreturn (*image_entry_noargs_t)(void);
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image_entry_noargs_t image_entry =
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(image_entry_noargs_t)(unsigned long)spl_image->entry_point;
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debug("image entry point: 0x%X\n", spl_image->entry_point);
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/* HAB looks for the CSF at the end of the authenticated data therefore,
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* we need to subtract the size of the CSF from the actual filesize */
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if (authenticate_image(spl_image->load_addr,
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spl_image->size - CONFIG_CSF_SIZE)) {
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image_entry();
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} else {
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puts("spl: ERROR: image authentication unsuccessful\n");
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hang();
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}
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}
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#endif
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