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https://github.com/brain-hackers/u-boot-brain
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f4e7e61193
Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014 - 2019 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*/
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#include <common.h>
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#include <dm/uclass.h>
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#include <i2c.h>
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int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
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{
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int ret = -EINVAL;
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#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
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struct udevice *dev;
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ofnode eeprom;
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eeprom = ofnode_get_chosen_node("xlnx,eeprom");
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if (!ofnode_valid(eeprom))
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return -ENODEV;
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debug("%s: Path to EEPROM %s\n", __func__,
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ofnode_get_chosen_prop("xlnx,eeprom"));
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ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
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if (ret)
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return ret;
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ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
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if (ret)
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debug("%s: I2C EEPROM MAC address read failed\n", __func__);
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else
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debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
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#endif
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return ret;
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}
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#if defined(CONFIG_OF_BOARD)
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void *board_fdt_blob_setup(void)
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{
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static void *fw_dtb = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
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if (fdt_magic(fw_dtb) != FDT_MAGIC) {
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printf("DTB is not passed via %p\n", fw_dtb);
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return NULL;
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}
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return fw_dtb;
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}
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#endif
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