u-boot-brain/arch/x86/cpu
Simon Glass 37c664e825 x86: Make sure the SPL image ends on a suitable boundary
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built
with any particular alignment. It ends at the start of the BSS section.
The BSS section selects its own alignment, which may larger.
This means that there can be a gap of a few bytes between the image
ending and BSS starting.

Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with
perhaps some padding for BSS), the expected result is not obtained. U-Boot
uses the end of BSS to find the devicetree, so this means that it cannot
be found.

Add 32-byte alignment of BSS so that the image size is correct and
appending the devicetree will place it at the end of BSS.

Example SPL output without this patch:

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000142a1  fef40000  fef40000  00001000  2**4
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
  1 .u_boot_list  000014a4  fef542a8  fef542a8  000152a8  2**3
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  2 .rodata       0000599c  fef55760  fef55760  00016760  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
  3 .data         00000970  fef5b100  fef5b100  0001c100  2**5
                  CONTENTS, ALLOC, LOAD, RELOC, DATA
  4 .binman_sym_table 00000020  fef5ba70  fef5ba70  0001ca70  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  5 .bss          00000060  fef5baa0  fef5baa0  00000000  2**5
                  ALLOC

You can see that .bss is aligned to 2**5 (32 bytes). This is because of
the mallinfo struct in dlmalloc.c:

 17 .bss.current_mallinfo 00000028  00000000  00000000  000004c0  2**5
                  ALLOC

In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up
with the _image_binary_end symbol:

fef5ba90 g       .binman_sym_table      00000000 _image_binary_end

But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte
alignment. So we must align _image_binary_end to a 32-byte boundary. This
forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as
expected.

Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even
though it generates an object file with a member that requests 32-byte
alignment.

The current_mallinfo struct is 40 bytes in size. Increasing the struct to
68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment
to go above 32 bytes. So it seems that 32 bytes is the maximum alignment
at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add more details in the commit message to help people understand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-02-01 15:29:02 +08:00
..
apollolake x86: apl: Enhance debugging in the SPL loader 2021-02-01 15:11:42 +08:00
baytrail cpu: Convert the methods to use a const udevice * 2020-07-25 14:46:57 -06:00
braswell common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
broadwell dm: Avoid accessing seq directly 2020-12-18 20:32:21 -07:00
coreboot x86: Rename board_final_cleanup() to board_final_init() 2020-07-17 14:32:24 +08:00
efi x86: Rename board_final_cleanup() to board_final_init() 2020-07-17 14:32:24 +08:00
i386 x86: typo segement 2021-01-30 14:25:41 -07:00
intel_common x86: Move priv/plat structs for intel_common to headers 2021-01-05 12:24:41 -07:00
ivybridge dm: Avoid accessing seq directly 2020-12-18 20:32:21 -07:00
qemu cpu: Convert the methods to use a const udevice * 2020-07-25 14:46:57 -06:00
quark x86: Change how selection of ROMs works 2020-07-28 19:30:39 -06:00
queensbay common: Drop init.h from common header 2020-05-18 17:33:33 -04:00
slimbootloader dm: Use access methods for dev/uclass private data 2021-01-05 12:24:40 -07:00
tangier Prepare v2021.01-rc5 2021-01-05 16:20:26 -05:00
x86_64 x86: cpu: Report address width from cpu_get_info() 2020-09-25 11:27:21 +08:00
acpi_gpe.c x86: acpi_gpe: Update driver name to match devicetree 2021-02-01 15:11:41 +08:00
call32.S x86: call32: Append appropriate suffixes 2020-08-03 10:46:56 +08:00
config.mk Remove CROSS_COMPILE default from arch/*/config.mk 2020-07-01 10:11:03 -04:00
cpu_x86.c dm: treewide: Rename ..._platdata variables to just ..._plat 2020-12-13 16:51:09 -07:00
cpu.c x86: Allow writing tables to fail 2020-11-05 14:58:45 +08:00
ioapic.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
irq.c dm: treewide: Rename auto_alloc_size members to be shorter 2020-12-13 08:00:25 -07:00
lapic.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
Makefile x86: Don't enable SMP in SPL 2020-07-20 09:46:46 +08:00
mp_init.c x86: Drop unnecessary mp_init logic 2020-12-18 20:32:21 -07:00
mtrr.c x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit() 2020-11-10 09:25:25 +08:00
pci.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
qfw_cpu.c dm: treewide: Rename ..._platdata variables to just ..._plat 2020-12-13 16:51:09 -07:00
resetvec.S x86: Reduce resetvec size 2019-10-11 17:37:38 +08:00
sipi_vector.S x86: sipi_vector: Append appropriate suffixes 2020-08-03 10:46:56 +08:00
start16.S Revert "x86: use invd instead of wbinvd in real mode start code" 2020-03-05 18:19:40 +08:00
start64.S x86: start64: Fix copyright message 2019-05-08 13:02:10 +08:00
start_from_spl.S x86: Use the existing stack when chain-loading 2020-04-30 17:48:17 +08:00
start_from_tpl.S x86: Add more comments to the start-up code 2019-10-08 13:57:36 +08:00
start.S x86: typo segement 2021-01-30 14:25:41 -07:00
turbo.c x86: apl: Reduce size for TPL 2021-01-05 12:24:41 -07:00
u-boot-64.lds x86: Include bss subsections in linker script 2018-08-20 14:17:43 +02:00
u-boot-spl.lds x86: Make sure the SPL image ends on a suitable boundary 2021-02-01 15:29:02 +08:00
u-boot.lds x86: Include bss subsections in linker script 2018-08-20 14:17:43 +02:00
wakeup.S x86: Move acpi_s3.h to include/acpi/ 2020-04-16 14:36:28 +08:00