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3776801d0a
Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> |
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arm | ||
avr32 | ||
blackfin | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
powerpc | ||
sh | ||
sparc | ||
x86 | ||
.gitignore |