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![Stephen Warren](/assets/img/avatar_default.png)
This centralizes knowledge of MMC clocking into the MMC driver. This also removes clock setup from the board files, which will simplify later changes that modify the Harmony board to support the correct set of MMC controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
186 lines
4.3 KiB
C
186 lines
4.3 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <ns16550.h>
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#include <asm/io.h>
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#include <asm/arch/tegra2.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/clk_rst.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/uart.h>
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#include "board.h"
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#ifdef CONFIG_TEGRA2_MMC
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#include <mmc.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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const struct tegra2_sysinfo sysinfo = {
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CONFIG_TEGRA2_BOARD_STRING
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};
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/*
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* Routine: timer_init
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* Description: init the timestamp and lastinc value
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*/
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int timer_init(void)
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{
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return 0;
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}
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static void enable_uart(enum periph_id pid)
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{
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/* Assert UART reset and enable clock */
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reset_set_enable(pid, 1);
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clock_enable(pid);
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clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
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/* wait for 2us */
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udelay(2);
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/* De-assert reset to UART */
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reset_set_enable(pid, 0);
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}
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/*
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* Routine: clock_init_uart
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* Description: init the PLL and clock for the UART(s)
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*/
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static void clock_init_uart(void)
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{
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#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
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enable_uart(PERIPH_ID_UART1);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
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#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
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enable_uart(PERIPH_ID_UART4);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
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}
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/*
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* Routine: pin_mux_uart
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* Description: setup the pin muxes/tristate values for the UART(s)
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*/
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static void pin_mux_uart(void)
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{
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#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
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pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
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pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
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pinmux_tristate_disable(PINGRP_IRRX);
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pinmux_tristate_disable(PINGRP_IRTX);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
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#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
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pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
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pinmux_tristate_disable(PINGRP_GMC);
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#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
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}
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#ifdef CONFIG_TEGRA2_MMC
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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static void pin_mux_mmc(void)
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{
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/* SDMMC4: config 3, x8 on 2nd set of pins */
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pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
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pinmux_tristate_disable(PINGRP_ATB);
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pinmux_tristate_disable(PINGRP_GMA);
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pinmux_tristate_disable(PINGRP_GME);
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/* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */
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pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
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pinmux_tristate_disable(PINGRP_SDC);
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pinmux_tristate_disable(PINGRP_SDD);
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pinmux_tristate_disable(PINGRP_SDB);
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}
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#endif
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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clock_init();
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clock_verify();
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/* boot param addr */
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gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
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return 0;
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}
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#ifdef CONFIG_TEGRA2_MMC
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/* this is a weak define that we are overriding */
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int board_mmc_init(bd_t *bd)
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{
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debug("board_mmc_init called\n");
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/* Enable muxes, etc. for SDMMC controllers */
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pin_mux_mmc();
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gpio_config_mmc();
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debug("board_mmc_init: init eMMC\n");
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/* init dev 0, eMMC chip, with 4-bit bus */
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tegra2_mmc_init(0, 4);
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debug("board_mmc_init: init SD slot\n");
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/* init dev 1, SD slot, with 4-bit bus */
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tegra2_mmc_init(1, 4);
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return 0;
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}
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#endif
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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/* Initialize essential common plls */
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clock_early_init();
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/* Initialize UART clocks */
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clock_init_uart();
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/* Initialize periph pinmuxes */
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pin_mux_uart();
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/* Initialize periph GPIOs */
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gpio_config_uart();
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/* Init UART, scratch regs, and start CPU */
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tegra2_start();
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return 0;
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}
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#endif /* EARLY_INIT */
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