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https://github.com/brain-hackers/u-boot-brain
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22e0de3551
This function needs to be different for FSP2, so move the existing function into the fsp1 directory. Since it is only called from one file, drop it from the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
86 lines
1.5 KiB
C
86 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <acpi_s3.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <errno.h>
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#include <rtc.h>
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#include <asm/cmos_layout.h>
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#include <asm/early_cmos.h>
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#include <asm/io.h>
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#include <asm/mrccache.h>
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#include <asm/post.h>
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#include <asm/processor.h>
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#include <asm/fsp/fsp_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu(void)
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{
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return 0;
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}
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int print_cpuinfo(void)
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{
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post_code(POST_CPU_INFO);
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return default_print_cpuinfo();
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}
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int fsp_init_phase_pci(void)
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{
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u32 status;
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/* call into FspNotify */
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debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
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status = fsp_notify(NULL, INIT_PHASE_PCI);
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if (status)
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debug("fail, error code %x\n", status);
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else
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debug("OK\n");
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return status ? -EPERM : 0;
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}
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void board_final_cleanup(void)
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{
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u32 status;
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/* call into FspNotify */
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debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
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status = fsp_notify(NULL, INIT_PHASE_BOOT);
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if (status)
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debug("fail, error code %x\n", status);
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else
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debug("OK\n");
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}
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#ifdef CONFIG_HAVE_ACPI_RESUME
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int fsp_save_s3_stack(void)
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{
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struct udevice *dev;
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int ret;
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if (gd->arch.prev_sleep_state == ACPI_S3)
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return 0;
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ret = uclass_get_device(UCLASS_RTC, 0, &dev);
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if (ret) {
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debug("Cannot find RTC: err=%d\n", ret);
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return -ENODEV;
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}
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/* Save the stack address to CMOS */
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ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
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if (ret) {
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debug("Save stack address to CMOS: err=%d\n", ret);
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return -EIO;
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}
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return 0;
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}
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#endif
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