mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-12 05:03:45 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
209 lines
3.3 KiB
C
209 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
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*/
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#ifndef _ASM_ARCH_GRF_RK3188_H
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#define _ASM_ARCH_GRF_RK3188_H
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struct rk3188_grf_gpio_lh {
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u32 l;
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u32 h;
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};
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struct rk3188_grf {
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struct rk3188_grf_gpio_lh gpio_dir[4];
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struct rk3188_grf_gpio_lh gpio_do[4];
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struct rk3188_grf_gpio_lh gpio_en[4];
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u32 reserved[2];
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u32 gpio0c_iomux;
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u32 gpio0d_iomux;
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u32 gpio1a_iomux;
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u32 gpio1b_iomux;
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u32 gpio1c_iomux;
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u32 gpio1d_iomux;
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u32 gpio2a_iomux;
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u32 gpio2b_iomux;
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u32 gpio2c_iomux;
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u32 gpio2d_iomux;
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u32 gpio3a_iomux;
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u32 gpio3b_iomux;
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u32 gpio3c_iomux;
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u32 gpio3d_iomux;
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u32 soc_con0;
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u32 soc_con1;
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u32 soc_con2;
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u32 soc_status0;
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u32 busdmac_con[3];
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u32 peridmac_con[4];
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u32 cpu_con[6];
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u32 reserved0[2];
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u32 ddrc_con0;
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u32 ddrc_stat;
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u32 io_con[5];
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u32 soc_status1;
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u32 uoc0_con[4];
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u32 uoc1_con[4];
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u32 uoc2_con[2];
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u32 reserved1;
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u32 uoc3_con[2];
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u32 hsic_stat;
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u32 os_reg[8];
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u32 gpio0_p[3];
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u32 gpio1_p[3][4];
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u32 flash_data_p;
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u32 flash_cmd_p;
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};
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check_member(rk3188_grf, flash_cmd_p, 0x01a4);
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/* GRF_SOC_CON0 */
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enum {
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HSADC_CLK_DIR_SHIFT = 15,
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HSADC_CLK_DIR_MASK = 1,
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HSADC_SEL_SHIFT = 14,
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HSADC_SEL_MASK = 1,
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NOC_REMAP_SHIFT = 12,
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NOC_REMAP_MASK = 1,
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EMMC_FLASH_SEL_SHIFT = 11,
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EMMC_FLASH_SEL_MASK = 1,
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TZPC_REVISION_SHIFT = 7,
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TZPC_REVISION_MASK = 0xf,
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L2CACHE_ACC_SHIFT = 5,
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L2CACHE_ACC_MASK = 3,
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L2RD_WAIT_SHIFT = 3,
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L2RD_WAIT_MASK = 3,
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IMEMRD_WAIT_SHIFT = 1,
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IMEMRD_WAIT_MASK = 3,
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};
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/* GRF_SOC_CON1 */
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enum {
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RKI2C4_SEL_SHIFT = 15,
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RKI2C4_SEL_MASK = 1,
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RKI2C3_SEL_SHIFT = 14,
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RKI2C3_SEL_MASK = 1,
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RKI2C2_SEL_SHIFT = 13,
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RKI2C2_SEL_MASK = 1,
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RKI2C1_SEL_SHIFT = 12,
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RKI2C1_SEL_MASK = 1,
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RKI2C0_SEL_SHIFT = 11,
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RKI2C0_SEL_MASK = 1,
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VCODEC_SEL_SHIFT = 10,
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VCODEC_SEL_MASK = 1,
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PERI_EMEM_PAUSE_SHIFT = 9,
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PERI_EMEM_PAUSE_MASK = 1,
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PERI_USB_PAUSE_SHIFT = 8,
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PERI_USB_PAUSE_MASK = 1,
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SMC_MUX_MODE_0_SHIFT = 6,
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SMC_MUX_MODE_0_MASK = 1,
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SMC_SRAM_MW_0_SHIFT = 4,
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SMC_SRAM_MW_0_MASK = 3,
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SMC_REMAP_0_SHIFT = 3,
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SMC_REMAP_0_MASK = 1,
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SMC_A_GT_M0_SYNC_SHIFT = 2,
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SMC_A_GT_M0_SYNC_MASK = 1,
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EMAC_SPEED_SHIFT = 1,
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EMAC_SPEEC_MASK = 1,
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EMAC_MODE_SHIFT = 0,
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EMAC_MODE_MASK = 1,
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};
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/* GRF_SOC_CON2 */
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enum {
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SDIO_CLK_OUT_SR_SHIFT = 15,
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SDIO_CLK_OUT_SR_MASK = 1,
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MEM_EMA_L2C_SHIFT = 11,
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MEM_EMA_L2C_MASK = 7,
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MEM_EMA_A9_SHIFT = 8,
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MEM_EMA_A9_MASK = 7,
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MSCH4_MAINDDR3_SHIFT = 7,
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MSCH4_MAINDDR3_MASK = 1,
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MSCH4_MAINDDR3_DDR3 = 1,
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EMAC_NEWRCV_EN_SHIFT = 6,
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EMAC_NEWRCV_EN_MASK = 1,
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SW_ADDR15_EN_SHIFT = 5,
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SW_ADDR15_EN_MASK = 1,
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SW_ADDR16_EN_SHIFT = 4,
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SW_ADDR16_EN_MASK = 1,
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SW_ADDR17_EN_SHIFT = 3,
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SW_ADDR17_EN_MASK = 1,
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BANK2_TO_RANK_EN_SHIFT = 2,
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BANK2_TO_RANK_EN_MASK = 1,
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RANK_TO_ROW15_EN_SHIFT = 1,
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RANK_TO_ROW15_EN_MASK = 1,
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UPCTL_C_ACTIVE_IN_SHIFT = 0,
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UPCTL_C_ACTIVE_IN_MASK = 1,
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UPCTL_C_ACTIVE_IN_MAY = 0,
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UPCTL_C_ACTIVE_IN_WILL,
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};
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/* GRF_DDRC_CON0 */
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enum {
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DDR_16BIT_EN_SHIFT = 15,
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DDR_16BIT_EN_MASK = 1,
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DTO_LB_SHIFT = 11,
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DTO_LB_MASK = 3,
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DTO_TE_SHIFT = 9,
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DTO_TE_MASK = 3,
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DTO_PDR_SHIFT = 7,
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DTO_PDR_MASK = 3,
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DTO_PDD_SHIFT = 5,
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DTO_PDD_MASK = 3,
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DTO_IOM_SHIFT = 3,
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DTO_IOM_MASK = 3,
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DTO_OE_SHIFT = 1,
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DTO_OE_MASK = 3,
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ATO_AE_SHIFT = 0,
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ATO_AE_MASK = 1,
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};
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#endif
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