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95ae700044
Change mxs_set_lcdclk prototype to add a new parameter base_addr. There are two LCD interfaces for i.MX6SX, we may support LCDIF1 or LCDIF2. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
55 lines
1.0 KiB
C
55 lines
1.0 KiB
C
/*
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* Freescale i.MX23/i.MX28 Clock
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CLOCK_H__
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#define __CLOCK_H__
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_AHB_CLK,
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MXC_IPG_CLK,
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MXC_EMI_CLK,
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MXC_GPMI_CLK,
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MXC_IO0_CLK,
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MXC_IO1_CLK,
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MXC_XTAL_CLK,
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MXC_SSP0_CLK,
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#ifdef CONFIG_MX28
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MXC_SSP1_CLK,
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MXC_SSP2_CLK,
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MXC_SSP3_CLK,
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#endif
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};
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enum mxs_ioclock {
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MXC_IOCLK0 = 0,
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MXC_IOCLK1,
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};
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enum mxs_sspclock {
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MXC_SSPCLK0 = 0,
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#ifdef CONFIG_MX28
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MXC_SSPCLK1,
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MXC_SSPCLK2,
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MXC_SSPCLK3,
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#endif
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};
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uint32_t mxc_get_clock(enum mxc_clock clk);
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void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
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void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
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void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
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void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq);
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/* Compatibility with the FEC Ethernet driver */
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#define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK)
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#endif /* __CLOCK_H__ */
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