mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-22 19:09:43 +09:00
7a8e9bed17
Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engström, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
95 lines
3.0 KiB
C
95 lines
3.0 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _BIOS_H_
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#define _BIOS_H_
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#define OFFS_ES 0 /* 16bit */
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#define OFFS_GS 2 /* 16bit */
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#define OFFS_DS 4 /* 16bit */
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#define OFFS_EDI 6 /* 32bit */
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#define OFFS_DI 6 /* low 16 bits of EDI */
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#define OFFS_ESI 10 /* 32bit */
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#define OFFS_SI 10 /* low 16 bits of ESI */
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#define OFFS_EBP 14 /* 32bit */
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#define OFFS_BP 14 /* low 16 bits of EBP */
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#define OFFS_ESP 18 /* 32bit */
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#define OFFS_SP 18 /* low 16 bits of ESP */
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#define OFFS_EBX 22 /* 32bit */
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#define OFFS_BX 22 /* low 16 bits of EBX */
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#define OFFS_BL 22 /* low 8 bits of BX */
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#define OFFS_BH 23 /* high 8 bits of BX */
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#define OFFS_EDX 26 /* 32bit */
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#define OFFS_DX 26 /* low 16 bits of EBX */
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#define OFFS_DL 26 /* low 8 bits of BX */
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#define OFFS_DH 27 /* high 8 bits of BX */
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#define OFFS_ECX 30 /* 32bit */
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#define OFFS_CX 30 /* low 16 bits of EBX */
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#define OFFS_CL 30 /* low 8 bits of BX */
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#define OFFS_CH 31 /* high 8 bits of BX */
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#define OFFS_EAX 34 /* 32bit */
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#define OFFS_AX 34 /* low 16 bits of EBX */
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#define OFFS_AL 34 /* low 8 bits of BX */
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#define OFFS_AH 35 /* high 8 bits of BX */
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#define OFFS_VECTOR 38 /* 16bit */
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#define OFFS_IP 40 /* 16bit */
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#define OFFS_CS 42 /* 16bit */
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#define OFFS_FLAGS 44 /* 16bit */
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#define SEGMENT 0x40
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#define STACK 0x800 /* stack at 0x40:0x800 -> 0x800 */
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/* save general registers */
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/* save some segments */
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/* save callers stack segment .. */
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/* ... in gs */
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/* setup my segments */
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/* setup BIOS stackpointer */
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#define MAKE_BIOS_STACK \
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pushal ; \
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pushw %ds ; \
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pushw %gs ; \
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pushw %es ; \
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pushw %ss ; \
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popw %gs ; \
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movw $SEGMENT,%ax ; \
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movw %ax,%ds ; \
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movw %ax,%es ; \
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movw %ax,%ss ; \
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movw %sp,%bp ; \
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movw $STACK,%sp
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#define RESTORE_CALLERS_STACK \
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pushw %gs ; /* restore callers stack segment */ \
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popw %ss ; \
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movw %bp,%sp ; /* restore stackpointer */ \
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\
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popw %es ; /* restore segment selectors */ \
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popw %gs ; \
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popw %ds ; \
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\
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popal /* restore GP registers */
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#endif
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