mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 19:56:18 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/device.h>
|
|
#include <asm/arch/quark.h>
|
|
|
|
/*
|
|
* Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
|
|
*
|
|
* We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this
|
|
* pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata()
|
|
* in the Intel ICH6 GPIO driver where it calls PCI configuration space access
|
|
* APIs which will trigger PCI enumeration process.
|
|
*
|
|
* Check <asm/arch-quark/quark.h> for more details.
|
|
*/
|
|
void board_assert_perst(void)
|
|
{
|
|
u32 base, port, val;
|
|
|
|
/* retrieve the GPIO IO base */
|
|
qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
|
|
base = (base & 0xffff) & ~0x7f;
|
|
|
|
/* enable the pin */
|
|
port = base + 0x20;
|
|
val = inl(port);
|
|
val |= (1 << 0);
|
|
outl(val, port);
|
|
|
|
/* configure the pin as output */
|
|
port = base + 0x24;
|
|
val = inl(port);
|
|
val &= ~(1 << 0);
|
|
outl(val, port);
|
|
|
|
/* pull it down (assert) */
|
|
port = base + 0x28;
|
|
val = inl(port);
|
|
val &= ~(1 << 0);
|
|
outl(val, port);
|
|
}
|
|
|
|
void board_deassert_perst(void)
|
|
{
|
|
u32 base, port, val;
|
|
|
|
/* retrieve the GPIO IO base */
|
|
qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
|
|
base = (base & 0xffff) & ~0x7f;
|
|
|
|
/* pull it up (de-assert) */
|
|
port = base + 0x28;
|
|
val = inl(port);
|
|
val |= (1 << 0);
|
|
outl(val, port);
|
|
}
|