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![Wolfgang Denk](/assets/img/avatar_default.png)
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
61 lines
2.5 KiB
C
61 lines
2.5 KiB
C
#ifndef __KAREF_H__
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#define __KAREF_H__
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/*
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* (C) Copyright 2005
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* Sandburst Corporation
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* Travis B. Sawyer
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Ka Reference Design OFEM FPGA Registers & definitions */
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#include "hal_ka_sc_auto.h"
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#include "hal_ka_of_auto.h"
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typedef struct karef_board_id_s {
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const char name[40];
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} KAREF_BOARD_ID_ST, *KAREF_BOARD_ID_PST;
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/* SCAN FPGA */
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typedef struct karef_fpga_regs_s
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{
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volatile unsigned long revision_ul; /* Read Only */
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volatile unsigned long reset_ul; /* Read/Write */
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volatile unsigned long interrupt_ul; /* Read Only */
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volatile unsigned long mask_ul; /* Read/Write */
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volatile unsigned long scratch_ul; /* Read/Write */
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volatile unsigned long scrmask_ul; /* Read/Write */
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volatile unsigned long status_ul; /* Read Only */
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volatile unsigned long control_ul; /* Read/Write */
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volatile unsigned long boardinfo_ul; /* Read Only */
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volatile unsigned long scan_from0_ul; /* Read Only */
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volatile unsigned long scan_from1_ul; /* Read Only */
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volatile unsigned long scan_to0_ul; /* Read/Write */
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volatile unsigned long scan_to1_ul; /* Read/Write */
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volatile unsigned long scan_control_ul; /* Read/Write */
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volatile unsigned long pll_control_ul; /* Read/Write */
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volatile unsigned long core_clock_cnt_ul; /* Read/Write */
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volatile unsigned long dr_clock_cnt_ul; /* Read/Write */
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volatile unsigned long spi_clock_cnt_ul; /* Read/Write */
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volatile unsigned long brdout_data_ul; /* Read/Write */
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volatile unsigned long brdout_enable_ul; /* Read/Write */
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volatile unsigned long brdin_data_ul; /* Read Only */
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volatile unsigned long misc_ul; /* Read/Write */
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} __attribute__((packed)) KAREF_FPGA_REGS_ST , * KAREF_FPGA_REGS_PST;
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/* OFEM FPGA */
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typedef struct ofem_fpga_regs_s
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{
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volatile unsigned long revision_ul; /* Read Only */
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volatile unsigned long reset_ul; /* Read/Write */
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volatile unsigned long interrupt_ul; /* Read Only */
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volatile unsigned long mask_ul; /* Read/Write */
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volatile unsigned long scratch_ul; /* Read/Write */
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volatile unsigned long scrmask_ul; /* Read/Write */
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volatile unsigned long control_ul; /* Read/Write */
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volatile unsigned long mac_flow_ctrl_ul; /* Read/Write */
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} __attribute__((packed)) OFEM_FPGA_REGS_ST , * OFEM_FPGA_REGS_PST;
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#endif /* __KAREF_H__ */
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