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https://github.com/brain-hackers/u-boot-brain
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01964d8e23
On STM32 family, the IPCC peripheral allows the communication between 2 processors offering doorbells mechanism. Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Loic Pallardy <loic.pallardy@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
45 lines
1.5 KiB
Plaintext
45 lines
1.5 KiB
Plaintext
menu "Mailbox Controller Support"
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config DM_MAILBOX
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bool "Enable mailbox controllers using Driver Model"
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depends on DM && OF_CONTROL
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help
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Enable support for the mailbox driver class. Mailboxes provide the
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ability to transfer small messages and/or notifications from one
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CPU to another CPU, or sometimes to dedicated HW modules. They form
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the basis of a variety of inter-process/inter-CPU communication
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protocols.
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config SANDBOX_MBOX
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bool "Enable the sandbox mailbox test driver"
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depends on DM_MAILBOX && SANDBOX
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help
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Enable support for a test mailbox implementation, which simply echos
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back a modified version of any message that is sent.
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config TEGRA_HSP
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bool "Enable Tegra HSP controller support"
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depends on DM_MAILBOX && TEGRA
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help
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This enables support for the NVIDIA Tegra HSP Hw module, which
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implements doorbells, mailboxes, semaphores, and shared interrupts.
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config STM32_IPCC
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bool "Enable STM32 IPCC controller support"
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depends on DM_MAILBOX && ARCH_STM32MP
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help
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This enables support for the STM32MP IPCC Hw module, which
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implements doorbells between 2 processors.
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config K3_SEC_PROXY
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bool "Texas Instruments K3 Secure Proxy Driver"
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depends on DM_MAILBOX && ARCH_K3
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help
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An implementation of Secure proxy slave driver for K3 SoCs from
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Texas Instruments. Secure proxy is a communication entity mainly
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used for communication between multiple processors with the SoC.
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Select this driver if your platform has support for this hardware
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block.
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endmenu
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