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https://github.com/brain-hackers/u-boot-brain
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![Álvaro Fernández Rojas](/assets/img/avatar_default.png)
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
247 lines
5.0 KiB
Plaintext
247 lines
5.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
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*/
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#include <dt-bindings/clock/bcm6368-clock.h>
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#include <dt-bindings/dma/bcm6368-dma.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/reset/bcm6368-reset.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm6368";
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aliases {
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spi0 = &spi;
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};
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cpus {
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reg = <0x10000000 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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cpu@1 {
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compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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u-boot,dm-pre-reloc;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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periph_clk: periph-clk {
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compatible = "brcm,bcm6345-clk";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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};
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pflash: nor@18000000 {
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compatible = "cfi-flash";
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reg = <0x18000000 0x2000000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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pll_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000008 0x4>;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pll_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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};
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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wdt: watchdog@1000005c {
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compatible = "brcm,bcm6345-wdt";
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reg = <0x1000005c 0xc>;
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clocks = <&periph_osc>;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdt>;
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};
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gpio1: gpio-controller@10000080 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000080 0x4>, <0x10000088 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <6>;
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status = "disabled";
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};
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gpio0: gpio-controller@10000084 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000084 0x4>, <0x1000008c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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leds: led-controller@100000d0 {
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compatible = "brcm,bcm6358-leds";
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reg = <0x100000d0 0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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uart0: serial@10000100 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000100 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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uart1: serial@10000120 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000120 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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nand: nand-controller@10000200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,nand-bcm6368",
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"brcm,brcmnand-v2.1",
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"brcm,brcmnand";
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reg-names = "nand",
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"nand-cache",
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"nand-int-base";
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reg = <0x10000200 0x180>,
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<0x10000600 0x200>,
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<0x100000b0 0x10>;
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clocks = <&periph_clk BCM6368_CLK_NAND>;
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clock-names = "nand";
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status = "disabled";
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};
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spi: spi@10000800 {
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compatible = "brcm,bcm6358-spi";
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reg = <0x10000800 0x70c>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&periph_clk BCM6368_CLK_SPI>;
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resets = <&periph_rst BCM6368_RST_SPI>;
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spi-max-frequency = <20000000>;
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num-cs = <6>;
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status = "disabled";
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};
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memory-controller@10001200 {
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compatible = "brcm,bcm6358-mc";
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reg = <0x10001200 0x4c>;
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u-boot,dm-pre-reloc;
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};
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ehci: usb-controller@10001500 {
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compatible = "brcm,bcm6368-ehci", "generic-ehci";
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reg = <0x10001500 0x100>;
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phys = <&usbh>;
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big-endian;
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status = "disabled";
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};
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ohci: usb-controller@10001600 {
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compatible = "brcm,bcm6368-ohci", "generic-ohci";
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reg = <0x10001600 0x100>;
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phys = <&usbh>;
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big-endian;
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status = "disabled";
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};
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usbh: usb-phy@10001700 {
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compatible = "brcm,bcm6368-usbh";
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reg = <0x10001700 0x38>;
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#phy-cells = <0>;
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clocks = <&periph_clk BCM6368_CLK_USBH>;
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clock-names = "usbh";
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resets = <&periph_rst BCM6368_RST_USBH>;
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status = "disabled";
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};
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iudma: dma-controller@10006800 {
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compatible = "brcm,bcm6368-iudma";
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reg = <0x10006800 0x80>,
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<0x10006a00 0x80>,
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<0x10006c00 0x80>;
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reg-names = "dma",
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"dma-channels",
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"dma-sram";
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#dma-cells = <1>;
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dma-channels = <8>;
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};
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enet: ethernet@10f00000 {
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compatible = "brcm,bcm6368-enet";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10f00000 0x10000>;
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clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
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<&periph_clk BCM6368_CLK_SWPKT_SAR>,
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<&periph_clk BCM6368_CLK_ROBOSW>;
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resets = <&periph_rst BCM6368_RST_SWITCH>,
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<&periph_rst BCM6368_RST_EPHY>;
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dmas = <&iudma BCM6368_DMA_ENETSW_RX>,
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<&iudma BCM6368_DMA_ENETSW_TX>;
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dma-names = "rx",
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"tx";
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brcm,num-ports = <6>;
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status = "disabled";
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};
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};
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};
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