Paul Burton 31d36f748c MIPS: Hang if run on a secondary CPU ... Some systems are configured such that multiple CPUs begin running from their reset vector following a system reset. If this occurs then U-Boot will be run on multiple CPUs simultaneously, which causes all sorts of issues as the multiple instances of U-Boot clobber each other. Prevent this from happening by simply hanging with an infinite loop if we run on a CPU whose ID, as determined by GlobalNumber or EBase.CPUNum as appropriate, is non-zero. Signed-off-by: Paul Burton <paul.burton@imgtec.com>		2016-09-21 17:04:53 +02:00
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cpu	MIPS: Hang if run on a secondary CPU	2016-09-21 17:04:53 +02:00
dts	boston: Introduce support for the MIPS Boston development board	2016-09-21 16:24:36 +02:00
include/asm	MIPS: Hang if run on a secondary CPU	2016-09-21 17:04:53 +02:00
lib	MIPS: Ensure cache ops complete in mips_cache_reset	2016-09-21 15:04:04 +02:00
mach-ath79	MIPS: ath79: Use mach_cpu_init instead of arch_cpu_init	2016-09-21 15:04:04 +02:00
mach-au1x00	net: mii: Use spatch to update miiphy_register	2016-08-15 15:26:33 -05:00
mach-pic32	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
config.mk	MIPS: provide a default u-boot-spl.lds	2016-05-31 09:38:11 +02:00
Kconfig	boston: Introduce support for the MIPS Boston development board	2016-09-21 16:24:36 +02:00
Makefile	MIPS: add tune for MIPS 34kc	2016-05-31 09:38:11 +02:00