u-boot-brain/board/freescale/p1010rdb
York Sun 1ba62f1017 powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
P1010RDB and p1_pc_rdb_pc has incorrect configuration for
CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING.
Incorrect setting causes DDR failure in case of SPD absent.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-04-24 23:58:30 -05:00
..
ddr.c powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards 2012-04-24 23:58:30 -05:00
law.c powerpc/85xx: Add basic support for P1010RDB 2011-09-29 19:01:04 -05:00
Makefile punt unused clean/distclean targets 2011-10-15 22:20:36 +02:00
p1010rdb.c powerpc/85xx: Make inclusion of USB device fixup conditional 2011-11-08 08:36:04 -06:00
tlb.c powerpc/85xx: Add basic support for P1010RDB 2011-09-29 19:01:04 -05:00