u-boot-brain/arch/arm/cpu/armv7/ls102xa
Hou Zhiqiang b392a6d4b0 fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:13 -07:00
..
clock.c
cpu.c
fdt.c arm: ls102xa: Rewrite the logic of ft_fixup_enet_phy_connect_type() 2016-01-28 12:23:22 -06:00
fsl_epu.c
fsl_epu.h
fsl_ls1_serdes.c fsl: serdes: ensure accessing the initialized maps of serdes protocol 2016-09-14 14:06:49 -07:00
fsl_ls1_serdes.h
ls102xa_sata.c
ls102xa_serdes.c
Makefile
psci.S ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention 2016-07-26 09:02:49 -07:00
soc.c fsl-layerscape: Add workaround for PCIe erratum A010315 2016-09-14 14:07:13 -07:00
spl.c common: Pass the boot device into spl_boot_mode() 2016-06-26 20:17:22 +02:00
timer.c