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https://github.com/brain-hackers/u-boot-brain
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e82d9ee73a
The SEC QI ICID setup in the QIIC_LS register is actually an offset that is being added to the ICID coming from the qman portal. Setting it with a non-zero value breaks SMMU setup as the resulting ICID is not known. On top of that, the SEC QI ICID must match the qman portal ICIDs in order to share the isolation context. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Horia Geanta <horia.geanta@nxp.com> Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
90 lines
3.3 KiB
C
90 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 NXP
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*/
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#include <common.h>
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#include <asm/arch-fsl-layerscape/immap_lsch2.h>
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#include <asm/arch-fsl-layerscape/fsl_icid.h>
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#include <asm/arch-fsl-layerscape/fsl_portals.h>
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#ifdef CONFIG_SYS_DPAA_QBMAN
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struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0),
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};
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#endif
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struct icid_id_table icid_tbl[] = {
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#ifdef CONFIG_SYS_DPAA_QBMAN
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SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START),
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SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1),
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#endif
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SET_SDHC_ICID(FSL_SDHC_STREAM_ID),
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SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID),
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SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID),
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SET_USB_ICID(3, "snps,dwc3", FSL_USB3_STREAM_ID),
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SET_SATA_ICID("fsl,ls1046a-ahci", FSL_SATA_STREAM_ID),
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SET_QDMA_ICID("fsl,ls1046a-qdma", FSL_QDMA_STREAM_ID),
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SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
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SET_ETR_ICID(FSL_ETR_STREAM_ID),
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SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
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#ifdef CONFIG_FSL_CAAM
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SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
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SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
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SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
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SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
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SET_SEC_JR_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 6),
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SET_SEC_RTIC_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 7),
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SET_SEC_RTIC_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 8),
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SET_SEC_RTIC_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 9),
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SET_SEC_RTIC_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 10),
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SET_SEC_DECO_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 11),
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SET_SEC_DECO_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 12),
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SET_SEC_DECO_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 13),
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#endif
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};
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int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct fman_icid_id_table fman_icid_tbl[] = {
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/* port id, icid */
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SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x29, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x2a, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x2b, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x2c, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x2d, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x10, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x11, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x30, FSL_DPAA1_STREAM_ID_END),
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SET_FMAN_ICID_ENTRY(0x31, FSL_DPAA1_STREAM_ID_END),
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};
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int fman_icid_tbl_sz = ARRAY_SIZE(fman_icid_tbl);
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#endif
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