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https://github.com/brain-hackers/u-boot-brain
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3365b4eb55
The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
38 lines
1.0 KiB
C
38 lines
1.0 KiB
C
/*
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* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/io.h>
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#include <mach/sbc-regs.h>
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#include <mach/sg-regs.h>
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void sbc_init(void)
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{
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/* only address/data multiplex mode is supported */
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/* XECS0 : boot/sub memory (boot swap = off/on) */
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writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL00);
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writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL01);
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writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL02);
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/* XECS1 : sub/boot memory (boot swap = off/on) */
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writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
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writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
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writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
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/* XECS2 : peripherals */
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writel(SBCTRL0_ADMULTIPLX_PERI_VALUE, SBCTRL20);
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writel(SBCTRL1_ADMULTIPLX_PERI_VALUE, SBCTRL21);
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writel(SBCTRL2_ADMULTIPLX_PERI_VALUE, SBCTRL22);
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/* base address regsiters */
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writel(0x0000bc01, SBBASE0);
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writel(0x0400bc01, SBBASE1);
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writel(0x0800bf01, SBBASE2);
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sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */
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}
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