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https://github.com/brain-hackers/u-boot-brain
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3365b4eb55
The init code for UMC (Unified Memory Controller) and PLL has not been mainlined yet, but U-boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/io.h>
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#include <mach/sbc-regs.h>
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#include <mach/sg-regs.h>
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void sbc_init(void)
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{
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/* only address/data multiplex mode is supported */
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/*
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* Only CS1 is connected to support card.
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* BKSZ[1:0] should be set to "01".
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*/
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writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
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writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
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writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
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if (boot_is_swapped()) {
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/*
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* Boot Swap On: boot from external NOR/SRAM
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* 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
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*
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* 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
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* 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
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*/
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writel(0x0000bc01, SBBASE0);
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} else {
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/*
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* Boot Swap Off: boot from mask ROM
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* 0x00000000-0x01ffffff: mask ROM
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* 0x02000000-0x03efffff: memory bank (31MB)
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* 0x03f00000-0x03ffffff: peripherals (1MB)
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*/
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writel(0x0000be01, SBBASE0); /* dummy */
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writel(0x0200be01, SBBASE1);
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}
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sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */
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}
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