mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 01:18:52 +09:00
![Chris Packham](/assets/img/avatar_default.png)
This is Marvell's Kirkwood development board. It has the following features - 512M DDR2 - 2 PCI connectors - 1 x1 PCI-e interface - 1 Gigabit Ethernet Port - 2 SATA Ports - USB 2.0 Interface - SDIO - 128M NAND Flash - 16M SPI Flash It can be strapped to boot from SPI or NAND so there are two defconfigs (one per boot media). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
95 lines
1.5 KiB
Plaintext
95 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Marvell DB-{88F6281,88F6282}-BP Development Board Setup
|
|
*
|
|
* Saeed Bishara <saeed@marvell.com>
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*
|
|
* This file contains the definitions that are common between the 6281
|
|
* and 6282 variants of the Marvell Kirkwood Development Board.
|
|
*/
|
|
|
|
#include "kirkwood.dtsi"
|
|
|
|
/ {
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x20000000>; /* 512 MB */
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200n8 earlyprintk";
|
|
stdout-path = &uart0;
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = ð0;
|
|
spi0 = &spi0;
|
|
};
|
|
|
|
ocp@f1000000 {
|
|
pin-controller@10000 {
|
|
pmx_sdio_gpios: pmx-sdio-gpios {
|
|
marvell,pins = "mpp37", "mpp38";
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
|
|
serial@12000 {
|
|
status = "okay";
|
|
};
|
|
|
|
sata@80000 {
|
|
nr-ports = <2>;
|
|
status = "okay";
|
|
};
|
|
|
|
ehci@50000 {
|
|
status = "okay";
|
|
};
|
|
|
|
mvsdio@90000 {
|
|
pinctrl-0 = <&pmx_sdio_gpios>;
|
|
pinctrl-names = "default";
|
|
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
|
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
|
|
&nand {
|
|
chip-delay = <25>;
|
|
status = "okay";
|
|
|
|
partition@0 {
|
|
label = "uboot";
|
|
reg = <0x0 0x100000>;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "uImage";
|
|
reg = <0x100000 0x400000>;
|
|
};
|
|
|
|
partition@500000 {
|
|
label = "root";
|
|
reg = <0x500000 0x1fb00000>;
|
|
};
|
|
};
|
|
|
|
&mdio {
|
|
status = "okay";
|
|
|
|
ethphy0: ethernet-phy@8 {
|
|
reg = <8>;
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
ethernet0-port@0 {
|
|
phy-handle = <ðphy0>;
|
|
};
|
|
};
|