mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 01:18:52 +09:00
![Marcel Ziswiler](/assets/img/avatar_default.png)
Migrate to using device tree required for further driver model integration. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
412 lines
9.3 KiB
Plaintext
412 lines
9.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Copyright 2019 Toradex AG
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "imx6dl.dtsi"
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/ {
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model = "Toradex Colibri iMX6DL/S";
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compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
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/* Will be filled by the bootloader */
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0>;
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};
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aliases {
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mmc0 = &usdhc3;
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mmc1 = &usdhc1;
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usb0 = &usbotg; /* required for ums */
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};
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chosen {
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stdout-path = &uart1;
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};
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reg_module_3v3: regulator-module-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "+V3.3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_host_vbus: regulator-usb-host-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
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regulator-name = "usb_host_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 31 GPIO_ACTIVE_LOW>; /* USBH_PEN */
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};
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};
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/*
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* PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
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* touch screen controller
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*/
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pmic: pfuze100@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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/* vgen1: unused */
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* vgen3: unused */
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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/*
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* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
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*/
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c3>;
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pinctrl-1 = <&pinctrl_i2c3_recovery>;
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scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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/* Colibri UART_A */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
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fsl,dte-mode;
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uart-has-rtscts;
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status = "okay";
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};
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/* Colibri UART_B */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_dte>;
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fsl,dte-mode;
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uart-has-rtscts;
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status = "okay";
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};
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/* Colibri UART_C */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_dte>;
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fsl,dte-mode;
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status = "okay";
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};
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/* Colibri USBH */
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&usbh1 {
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dr_mode = "host";
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vbus-supply = <®_usb_host_vbus>;
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status = "okay";
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};
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/* Colibri USBC */
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&usbotg {
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dr_mode = "host";
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status = "okay";
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};
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/* Colibri MMC */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
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cd-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */
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disable-wp;
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vqmmc-supply = <®_module_3v3>;
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bus-width = <4>;
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no-1-8-v;
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status = "okay";
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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vqmmc-supply = <®_module_3v3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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status = "okay";
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};
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&iomuxc {
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pinctrl_ecspi4: ecspi4grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
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MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
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MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
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/* SPI CS */
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0)
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>;
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};
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pinctrl_gpio_bl_on: gpioblon {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0
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>;
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};
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pinctrl_hdmi_ddc: hdmiddcgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3_recovery: i2c3recoverygrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
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MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
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>;
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};
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pinctrl_ipu1_lcdif: ipu1lcdifgrp {
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fsl,pins = <
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MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xa1
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MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xa1
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MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xa1
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MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xa1
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MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xa1
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MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xa1
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MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xa1
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MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xa1
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MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xa1
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MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xa1
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MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xa1
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MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xa1
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MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xa1
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MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xa1
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MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xa1
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MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xa1
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MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xa1
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MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xa1
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MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xa1
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MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xa1
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MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xa1
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MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xa1
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>;
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};
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pinctrl_mmc_cd: gpiommccd {
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fsl,pins = <
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MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
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MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040
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>;
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};
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pinctrl_pwm3: pwm3grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040
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>;
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};
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
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>;
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};
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pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
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fsl,pins = <
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/* SODIMM 129 USBH_PEN */
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058
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>;
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};
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pinctrl_uart1_dce: uart1dcegrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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/* DTE mode */
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pinctrl_uart1_dte: uart1dtegrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
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>;
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};
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/* Additional DTR, DSR, DCD */
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pinctrl_uart1_ctrl: uart1ctrlgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
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MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
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MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
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>;
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};
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pinctrl_uart2_dte: uart2dtegrp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
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>;
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};
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pinctrl_uart3_dte: uart3dtegrp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
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/* eMMC reset */
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MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
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>;
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};
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};
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