mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
3433a693a9
A few boards define this in a header file which is incorrect. It means that Kconfig options that rely on this cannot be used. Move it. Note that quite a few boards defined this options but do not appear to actually use SPL: BSC9132QDS_NOR_DDRCLK100_SECURE BSC9132QDS_NOR_DDRCLK133_SECURE BSC9132QDS_SDCARD_DDRCLK100_SECURE BSC9132QDS_SDCARD_DDRCLK133_SECURE BSC9132QDS_SPIFLASH_DDRCLK100_SECURE BSC9132QDS_SPIFLASH_DDRCLK133_SECURE C29XPCIE_NOR_SECBOOT P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P1010RDB-PA_NAND_SECBOOT P1010RDB-PA_NOR_SECBOOT P1010RDB-PB_36BIT_NOR_SECBOOT P1010RDB-PB_36BIT_SPIFLASH_SECBOOT P1010RDB-PB_NAND_SECBOOT P1010RDB-PB_NOR_SECBOOT P3041DS_SECURE_BOOT P4080DS_SECURE_BOOT P5020DS_NAND_SECURE_BOOT P5040DS_SECURE_BOOT T1023RDB_SECURE_BOOT T1024QDS_DDR4_SECURE_BOOT T1024QDS_SECURE_BOOT T1024RDB_SECURE_BOOT T1040RDB_SECURE_BOOT T1042D4RDB_SECURE_BOOT T1042RDB_SECURE_BOOT T2080QDS_SECURE_BOOT T2080RDB_SECURE_BOOT T4160QDS_SECURE_BOOT T4240QDS_SECURE_BOOT ls1021aqds_nor_SECURE_BOOT ls1021atwr_nor_SECURE_BOOT ls1043ardb_SECURE_BOOT For these boards CONFIG_SPL_DM will no-longer be defined in SPL. But since they apparently don't have an SPL, this should not matter. Signed-off-by: Simon Glass <sjg@chromium.org>
132 lines
3.7 KiB
C
132 lines
3.7 KiB
C
/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_SECURE_BOOT_H
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#define __FSL_SECURE_BOOT_H
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#ifdef CONFIG_SECURE_BOOT
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#ifndef CONFIG_FIT_SIGNATURE
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#define CONFIG_CHAIN_OF_TRUST
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#endif
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#endif
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#ifdef CONFIG_CHAIN_OF_TRUST
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#define CONFIG_CMD_ESBC_VALIDATE
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#define CONFIG_FSL_SEC_MON
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#define CONFIG_SHA_HW_ACCEL
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#define CONFIG_SHA_PROG_HW_ACCEL
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#define CONFIG_RSA_FREESCALE_EXP
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#ifndef CONFIG_FSL_CAAM
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#define CONFIG_FSL_CAAM
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#endif
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_CRYPTO_SUPPORT
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#define CONFIG_SPL_HASH_SUPPORT
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#define CONFIG_SPL_RSA
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#ifdef CONFIG_SPL_BUILD
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/*
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* Define the key hash for U-Boot here if public/private key pair used to
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* sign U-boot are different from the SRK hash put in the fuse
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* Example of defining KEY_HASH is
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* #define CONFIG_SPL_UBOOT_KEY_HASH \
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* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
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* else leave it defined as NULL
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*/
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#define CONFIG_SPL_UBOOT_KEY_HASH NULL
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#endif /* ifdef CONFIG_SPL_BUILD */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_BLOB
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#define CONFIG_CMD_HASH
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#define CONFIG_KEY_REVOCATION
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#ifndef CONFIG_SYS_RAMBOOT
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/* The key used for verification of next level images
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* is picked up from an Extension Table which has
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* been verified by the ISBC (Internal Secure boot Code)
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* in boot ROM of the SoC.
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* The feature is only applicable in case of NOR boot and is
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* not applicable in case of RAMBOOT (NAND, SD, SPI).
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*/
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#ifndef CONFIG_ESBC_HDR_LS
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/* Current Key EXT feature not available in LS ESBC Header */
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#define CONFIG_FSL_ISBC_KEY_EXT
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#endif
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#endif
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#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
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/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
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* Similiarly for LS2080
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*/
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#define CONFIG_ESBC_ADDR_64BIT
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#endif
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#ifdef CONFIG_LS2080A
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#define CONFIG_EXTRA_ENV \
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"setenv fdt_high 0xa0000000;" \
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"setenv initrd_high 0xcfffffff;" \
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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#else
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#define CONFIG_EXTRA_ENV \
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"setenv fdt_high 0xffffffff;" \
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"setenv initrd_high 0xffffffff;" \
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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#endif
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/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
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* Non-XIP Memory (Nand/SD)*/
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#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
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defined(CONFIG_SD_BOOT)
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#define CONFIG_BOOTSCRIPT_COPY_RAM
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#endif
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/* The address needs to be modified according to NOR, NAND, SD and
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* DDR memory map
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*/
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#ifdef CONFIG_LS2080A
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x583920000
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#define CONFIG_BS_ADDR_DEVICE 0x583900000
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#define CONFIG_BS_HDR_ADDR_RAM 0xa3920000
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#define CONFIG_BS_ADDR_RAM 0xa3900000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#else
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#ifdef CONFIG_SD_BOOT
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/* For SD boot address and size are assigned in terms of sector
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* offset and no. of sectors respectively.
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*/
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000800
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#define CONFIG_BS_ADDR_DEVICE 0x00000840
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#define CONFIG_BS_HDR_SIZE 0x00000010
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#define CONFIG_BS_SIZE 0x00000008
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#else
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
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#define CONFIG_BS_ADDR_DEVICE 0x60060000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#endif /* #ifdef CONFIG_SD_BOOT */
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#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
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#define CONFIG_BS_ADDR_RAM 0x81020000
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#endif
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#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
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#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
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#else
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
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/* BOOTSCRIPT_ADDR is not required */
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#endif
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#include <config_fsl_chain_trust.h>
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#endif /* #ifndef CONFIG_SPL_BUILD */
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#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
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#endif
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