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787964b811
NAND,CPLD AMASK register is programmed for 64K size. so Update TLB & LAW size accordingly. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
20 lines
543 B
C
20 lines
543 B
C
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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struct law_entry law_table[] = {
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SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
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SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
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SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
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SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
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LAW_TRGT_IF_PLATFORM_SRAM),
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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