mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-10 21:26:19 +09:00
44c5580f1c
The u-boot-spl.srec is needed for the minimon update on Gen2 SoCs, conveniently generate this file if SPL is enabled. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
56 lines
1.3 KiB
C
56 lines
1.3 KiB
C
/*
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* include/configs/rcar-gen2-common.h
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*
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* Copyright (C) 2013,2014 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __RCAR_GEN2_COMMON_H
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#define __RCAR_GEN2_COMMON_H
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#include <asm/arch/rmobile.h>
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_TARGET "spl/u-boot-spl.srec"
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#endif
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#undef CONFIG_SHOW_BOOT_PROGRESS
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_TMU_TIMER
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#ifndef CONFIG_PINCTRL_PFC
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#define CONFIG_SH_GPIO_PFC
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#endif
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/* console */
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 }
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#define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0)
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* ENV setting */
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#define CONFIG_ENV_ADDR 0xC0000
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/* Common ENV setting */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_SECT_SIZE (256 * 1024)
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
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#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
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#endif /* __RCAR_GEN2_COMMON_H */
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