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![Masahiro Yamada](/assets/img/avatar_default.png)
Since CONFIG_CMD_IMPORTENV is defined in config_cmd_defaults.h, it should be enabled for all the boards except bf506f-ezkit that undefs it explicitely. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
107 lines
2.4 KiB
C
107 lines
2.4 KiB
C
/*
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* U-boot - Configuration file for BF506F EZ-Kit board
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*/
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#ifndef __CONFIG_BF506F_EZKIT_H__
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#define __CONFIG_BF506F_EZKIT_H__
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#include <asm/config-pre.h>
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/*
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* Processor Settings
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*/
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#define CONFIG_BFIN_CPU bf506-0.0
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#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
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/*
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* Clock Settings
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* CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
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* SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
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*/
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/* CONFIG_CLKIN_HZ is any value in Hz */
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#define CONFIG_CLKIN_HZ 25000000
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/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
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/* 1 = CLKIN / 2 */
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#define CONFIG_CLKIN_HALF 0
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/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
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/* 1 = bypass PLL */
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#define CONFIG_PLL_BYPASS 0
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
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/* Values can range from 0-63 (where 0 means 64) */
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#define CONFIG_VCO_MULT 16
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/* CCLK_DIV controls the core clock divider */
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/* Values can be 1, 2, 4, or 8 ONLY */
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#define CONFIG_CCLK_DIV 1
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/* SCLK_DIV controls the system clock divider */
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/* Values can range from 1-15 */
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#define CONFIG_SCLK_DIV 5
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/*
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* Memory Settings
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*/
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#define CONFIG_MEM_SIZE 0
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#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
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#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
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#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
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#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
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#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
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/*
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* Flash Settings
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*/
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/*
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_BASE 0x20000000
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 71
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#define CONFIG_CMD_FLASH
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#define CONFIG_MONITOR_IS_IN_RAM
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*/
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#define CONFIG_SYS_NO_FLASH
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/*
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* SPI Settings
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*/
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#define CONFIG_BFIN_SPI
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#define CONFIG_ENV_SPI_MAX_HZ 30000000
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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/*
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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*/
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/*
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* Env Storage Settings
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*/
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_SIZE 0x400
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/*
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* Misc Settings
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*/
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ICACHE_OFF
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#define CONFIG_DCACHE_OFF
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#define CONFIG_UART_CONSOLE 0
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BFIN_SERIAL
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#define CONFIG_CMD_MEMORY
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#undef CONFIG_GZIP
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#undef CONFIG_ZLIB
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#undef CONFIG_BOOTM_RTEMS
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#undef CONFIG_BOOTM_LINUX
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#endif
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