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https://github.com/brain-hackers/u-boot-brain
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The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
76 lines
1.2 KiB
Plaintext
76 lines
1.2 KiB
Plaintext
/*
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* Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3288-firefly.dtsi"
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/ {
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model = "Firefly-RK3288";
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compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
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chosen {
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stdout-path = &uart2;
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};
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config {
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u-boot,dm-pre-reloc;
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u-boot,boot-led = "firefly:green:power";
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};
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};
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&dmc {
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rockchip,num-channels = <2>;
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rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
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0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
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0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
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0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
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0x5 0x0>;
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rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
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0xa60 0x40 0x10 0x0>;
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rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
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rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
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};
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&ir {
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gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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act8846 {
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pmic_vsel: pmic-vsel {
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rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
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};
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};
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ir {
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ir_int: ir-int {
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rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pwm1 {
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status = "okay";
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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reg-shift = <2>;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio8 {
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u-boot,dm-pre-reloc;
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};
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