mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-27 04:18:51 +09:00
358 lines
8.2 KiB
C
358 lines
8.2 KiB
C
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/*
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* Copyright 1998-2001 by Donald Becker.
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* This software may be used and distributed according to the terms of
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* the GNU General Public License (GPL), incorporated herein by reference.
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* Contact the author for use under other terms.
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*
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* This program must be compiled with "-O"!
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* See the bottom of this file for the suggested compile-command.
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*
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* The author may be reached as becker@scyld.com, or C/O
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* Scyld Computing Corporation
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* 410 Severn Ave., Suite 210
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* Annapolis MD 21403
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*
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* Common-sense licensing statement: Using any portion of this program in
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* your own program means that you must give credit to the original author
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* and release the resulting code under the GPL.
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*/
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#define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */
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#include <common.h>
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#include <exports.h>
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#include <asm/io.h>
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/* Default EEPROM for i82559 */
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static unsigned short default_eeprom[64] = {
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0x0100, 0x0302, 0x0504, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0x40c0, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff
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};
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static unsigned short eeprom[256];
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static int eeprom_size = 64;
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static int eeprom_addr_size = 6;
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static int debug = 0;
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static inline unsigned short swap16(unsigned short x)
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{
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return (((x & 0xff) << 8) | ((x & 0xff00) >> 8));
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}
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void * memcpy(void * dest,const void *src,size_t count)
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{
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char *tmp = (char *) dest, *s = (char *) src;
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while (count--)
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*tmp++ = *s++;
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return dest;
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}
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/* The EEPROM commands include the alway-set leading bit. */
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#define EE_WRITE_CMD (5)
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#define EE_READ_CMD (6)
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#define EE_ERASE_CMD (7)
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/* Serial EEPROM section. */
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#define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */
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#define EE_CS 0x02 /* EEPROM chip select. */
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#define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
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#define EE_DATA_READ 0x08 /* EEPROM chip data out. */
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#define EE_ENB (0x4800 | EE_CS)
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#define EE_WRITE_0 0x4802
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#define EE_WRITE_1 0x4806
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#define EE_OFFSET 14
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/* Delay between EEPROM clock transitions. */
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#define eeprom_delay(ee_addr) inw(ee_addr)
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/* Wait for the EEPROM to finish the previous operation. */
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static int eeprom_busy_poll(long ee_ioaddr)
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{
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int i;
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outw(EE_ENB, ee_ioaddr);
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for (i = 0; i < 10000; i++) /* Typical 2000 ticks */
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if (inw(ee_ioaddr) & EE_DATA_READ)
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break;
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return i;
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}
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/* This executes a generic EEPROM command, typically a write or write enable.
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It returns the data output from the EEPROM, and thus may also be used for
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reads. */
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static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
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{
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unsigned retval = 0;
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long ee_addr = ioaddr + EE_OFFSET;
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if (debug > 1)
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printf(" EEPROM op 0x%x: ", cmd);
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outw(EE_ENB | EE_SHIFT_CLK, ee_addr);
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/* Shift the command bits out. */
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do {
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short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
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outw(dataval, ee_addr);
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eeprom_delay(ee_addr);
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if (debug > 2)
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printf("%X", inw(ee_addr) & 15);
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outw(dataval | EE_SHIFT_CLK, ee_addr);
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eeprom_delay(ee_addr);
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retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
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} while (--cmd_len >= 0);
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#if 0
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outw(EE_ENB, ee_addr);
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#endif
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/* Terminate the EEPROM access. */
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outw(EE_ENB & ~EE_CS, ee_addr);
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if (debug > 1)
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printf(" EEPROM result is 0x%5.5x.\n", retval);
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return retval;
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}
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static int read_eeprom(long ioaddr, int location, int addr_len)
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{
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return do_eeprom_cmd(ioaddr, ((EE_READ_CMD << addr_len) | location)
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<< 16 , 3 + addr_len + 16) & 0xffff;
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}
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static void write_eeprom(long ioaddr, int index, int value, int addr_len)
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{
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long ee_ioaddr = ioaddr + EE_OFFSET;
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int i;
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/* Poll for previous op finished. */
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eeprom_busy_poll(ee_ioaddr); /* Typical 0 ticks */
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/* Enable programming modes. */
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do_eeprom_cmd(ioaddr, (0x4f << (addr_len-4)), 3 + addr_len);
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/* Do the actual write. */
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do_eeprom_cmd(ioaddr,
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(((EE_WRITE_CMD<<addr_len) | index)<<16) | (value & 0xffff),
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3 + addr_len + 16);
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/* Poll for write finished. */
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i = eeprom_busy_poll(ee_ioaddr); /* Typical 2000 ticks */
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if (debug)
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printf(" Write finished after %d ticks.\n", i);
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/* Disable programming. This command is not instantaneous, so we check
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for busy before the next op. */
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do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len);
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eeprom_busy_poll(ee_ioaddr);
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}
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static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)
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{
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unsigned short checksum = 0;
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int size_test;
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int i;
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printf("Resetting i82559 EEPROM @ 0x%08lx ... ", ioaddr);
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size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27);
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eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6;
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eeprom_size = 1 << eeprom_addr_size;
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memcpy(eeprom, default_eeprom, sizeof default_eeprom);
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for (i = 0; i < 3; i++)
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eeprom[i] = (hwaddr[i*2+1]<<8) + hwaddr[i*2];
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/* Recalculate the checksum. */
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for (i = 0; i < eeprom_size - 1; i++)
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checksum += eeprom[i];
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eeprom[i] = 0xBABA - checksum;
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for (i = 0; i < eeprom_size; i++)
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write_eeprom(ioaddr, i, eeprom[i], eeprom_addr_size);
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for (i = 0; i < eeprom_size; i++)
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if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) {
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printf("failed\n");
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return 1;
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}
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printf("done\n");
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return 0;
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}
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static unsigned int hatoi(char *p, char **errp)
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{
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unsigned int res = 0;
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while (1) {
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switch (*p) {
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case 'a':
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case 'b':
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case 'c':
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case 'd':
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case 'e':
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case 'f':
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res |= (*p - 'a' + 10);
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break;
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case 'A':
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case 'B':
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case 'C':
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case 'D':
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case 'E':
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case 'F':
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res |= (*p - 'A' + 10);
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break;
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case '0':
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case '1':
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case '2':
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case '3':
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case '4':
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case '5':
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case '6':
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case '7':
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case '8':
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case '9':
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res |= (*p - '0');
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break;
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default:
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if (errp) {
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*errp = p;
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}
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return res;
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}
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p++;
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if (*p == 0) {
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break;
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}
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res <<= 4;
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}
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if (errp) {
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*errp = NULL;
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}
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return res;
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}
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static unsigned char *gethwaddr(char *in, unsigned char *out)
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{
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char tmp[3];
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int i;
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char *err;
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for (i=0;i<6;i++) {
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if (in[i*3+2] == 0 && i == 5) {
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out[i] = hatoi(&in[i*3], &err);
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if (err) {
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return NULL;
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}
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} else if (in[i*3+2] == ':' && i < 5) {
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tmp[0] = in[i*3];
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tmp[1] = in[i*3+1];
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tmp[2] = 0;
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out[i] = hatoi(tmp, &err);
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if (err) {
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return NULL;
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}
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} else {
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return NULL;
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}
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}
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return out;
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}
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static u32
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read_config_dword(int bus, int dev, int func, int reg)
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{
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u32 res;
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outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc),
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0xcf8);
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res = inl(0xcfc);
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outl(0, 0xcf8);
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return res;
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}
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static u16
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read_config_word(int bus, int dev, int func, int reg)
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{
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u32 res;
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outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc),
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0xcf8);
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res = inw(0xcfc + (reg & 2));
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outl(0, 0xcf8);
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return res;
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}
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static void
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write_config_word(int bus, int dev, int func, int reg, u16 data)
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{
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outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc),
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0xcf8);
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outw(data, 0xcfc + (reg & 2));
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outl(0, 0xcf8);
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}
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int main (int argc, char *argv[])
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{
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unsigned char *eth_addr;
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uchar buf[6];
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int instance;
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app_startup(argv);
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if (argc != 2) {
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printf ("call with base Ethernet address\n");
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return 1;
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}
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eth_addr = gethwaddr(argv[1], buf);
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if (NULL == eth_addr) {
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printf ("Can not parse ethernet address\n");
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return 1;
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}
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if (eth_addr[5] & 0x01) {
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printf("Base Ethernet address must be even\n");
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}
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for (instance = 0; instance < 2; instance ++) {
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unsigned int io_addr;
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unsigned char mac[6];
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int bar1 = read_config_dword(0, 6+instance, 0, 0x14);
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if (! (bar1 & 1)) {
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printf("ETH%d is disabled %x\n", instance, bar1);
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} else {
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printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3);
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}
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io_addr = (bar1 & (~3L));
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write_config_word(0, 6+instance, 0, 4,
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read_config_word(0, 6+instance, 0, 4) | 1);
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printf("ETH%d CMD %04x\n", instance,
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read_config_word(0, 6+instance, 0, 4));
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memcpy(mac, eth_addr, 6);
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mac[5] += instance;
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printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n",
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io_addr, mac[0], mac[1], mac[2],
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mac[3], mac[4], mac[5]);
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reset_eeprom(io_addr, mac);
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}
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return 0;
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}
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