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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
166 lines
3.4 KiB
C
166 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <rtc.h>
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#include <asm/acpi_s3.h>
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#include <asm/cmos_layout.h>
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#include <asm/early_cmos.h>
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#include <asm/io.h>
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#include <asm/mrccache.h>
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#include <asm/post.h>
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#include <asm/processor.h>
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#include <asm/fsp/fsp_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkcpu(void)
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{
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return 0;
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}
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int print_cpuinfo(void)
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{
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post_code(POST_CPU_INFO);
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return default_print_cpuinfo();
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}
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int fsp_init_phase_pci(void)
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{
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u32 status;
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/* call into FspNotify */
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debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
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status = fsp_notify(NULL, INIT_PHASE_PCI);
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if (status)
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debug("fail, error code %x\n", status);
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else
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debug("OK\n");
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return status ? -EPERM : 0;
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}
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void board_final_cleanup(void)
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{
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u32 status;
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/* call into FspNotify */
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debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
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status = fsp_notify(NULL, INIT_PHASE_BOOT);
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if (status)
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debug("fail, error code %x\n", status);
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else
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debug("OK\n");
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return;
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}
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static __maybe_unused void *fsp_prepare_mrc_cache(void)
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{
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struct mrc_data_container *cache;
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struct mrc_region entry;
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int ret;
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ret = mrccache_get_region(NULL, &entry);
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if (ret)
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return NULL;
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cache = mrccache_find_current(&entry);
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if (!cache)
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return NULL;
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debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
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cache->data, cache->data_size, cache->checksum);
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return cache->data;
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}
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#ifdef CONFIG_HAVE_ACPI_RESUME
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int fsp_save_s3_stack(void)
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{
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struct udevice *dev;
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int ret;
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if (gd->arch.prev_sleep_state == ACPI_S3)
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return 0;
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ret = uclass_get_device(UCLASS_RTC, 0, &dev);
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if (ret) {
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debug("Cannot find RTC: err=%d\n", ret);
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return -ENODEV;
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}
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/* Save the stack address to CMOS */
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ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
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if (ret) {
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debug("Save stack address to CMOS: err=%d\n", ret);
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return -EIO;
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}
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return 0;
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}
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#endif
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int arch_fsp_init(void)
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{
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void *nvs;
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int stack = CONFIG_FSP_TEMP_RAM_ADDR;
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int boot_mode = BOOT_FULL_CONFIG;
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#ifdef CONFIG_HAVE_ACPI_RESUME
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int prev_sleep_state = chipset_prev_sleep_state();
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gd->arch.prev_sleep_state = prev_sleep_state;
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#endif
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if (!gd->arch.hob_list) {
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#ifdef CONFIG_ENABLE_MRC_CACHE
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nvs = fsp_prepare_mrc_cache();
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#else
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nvs = NULL;
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#endif
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#ifdef CONFIG_HAVE_ACPI_RESUME
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if (prev_sleep_state == ACPI_S3) {
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if (nvs == NULL) {
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/* If waking from S3 and no cache then */
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debug("No MRC cache found in S3 resume path\n");
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post_code(POST_RESUME_FAILURE);
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/* Clear Sleep Type */
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chipset_clear_sleep_state();
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/* Reboot */
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debug("Rebooting..\n");
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reset_cpu(0);
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/* Should not reach here.. */
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panic("Reboot System");
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}
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/*
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* DM is not avaiable yet at this point, hence call
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* CMOS access library which does not depend on DM.
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*/
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stack = cmos_read32(CMOS_FSP_STACK_ADDR);
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boot_mode = BOOT_ON_S3_RESUME;
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}
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#endif
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/*
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* The first time we enter here, call fsp_init().
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* Note the execution does not return to this function,
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* instead it jumps to fsp_continue().
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*/
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fsp_init(stack, boot_mode, nvs);
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} else {
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/*
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* The second time we enter here, adjust the size of malloc()
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* pool before relocation. Given gd->malloc_base was adjusted
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* after the call to board_init_f_init_reserve() in arch/x86/
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* cpu/start.S, we should fix up gd->malloc_limit here.
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*/
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gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
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}
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return 0;
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}
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