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https://github.com/brain-hackers/u-boot-brain
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![Simon Glass](/assets/img/avatar_default.png)
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
146 lines
3.8 KiB
C
146 lines
3.8 KiB
C
/*
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* Copyright (C) 2016 NXP Semiconductors
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*
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* Configuration settings for the i.MX7S Warp board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __WARP7_CONFIG_H
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#define __WARP7_CONFIG_H
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#include "mx7_common.h"
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#define PHYS_SDRAM_SIZE SZ_512M
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
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/* MMC Config*/
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
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#define CONFIG_SUPPORT_EMMC_BOOT
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#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_DFU_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"ethact=usb_ether\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx7s-warp.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"finduuid=part uuid mmc 0:2 uuid\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=PARTUUID=${uuid} rootwait rw\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run finduuid; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"fi; " \
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"fi; " \
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"fi"
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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/* environment organization */
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 0
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
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#define CONFIG_IMX_THERMAL
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#define CONFIG_USBD_HS
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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/* USB Device Firmware Update support */
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_CDC
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#define CONFIG_USB_ETH_RNDIS
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#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
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#define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01"
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#endif
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