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https://github.com/brain-hackers/u-boot-brain
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![gaurav rana](/assets/img/avatar_default.png)
The Security Monitor is the SOC’s central reporting point for security-relevant events such as the success or failure of boot software validation and the detection of potential security compromises. The API's for transition of Security states have been added which will be used in case of SECURE BOOT. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
64 lines
2.3 KiB
Plaintext
64 lines
2.3 KiB
Plaintext
config CMD_CROS_EC
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bool "Enable crosec command"
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depends on CROS_EC
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help
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Enable command-line access to the Chrome OS EC (Embedded
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Controller). This provides the 'crosec' command which has
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a number of sub-commands for performing EC tasks such as
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updating its flash, accessing a small saved context area
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and talking to the I2C bus behind the EC (if there is one).
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config CROS_EC
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bool "Enable Chrome OS EC"
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help
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Enable access to the Chrome OS EC. This is a separate
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microcontroller typically available on a SPI bus on Chromebooks. It
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provides access to the keyboard, some internal storage and may
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control access to the battery and main PMIC depending on the
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device. You can use the 'crosec' command to access it.
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config CROS_EC_I2C
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bool "Enable Chrome OS EC I2C driver"
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depends on CROS_EC
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help
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Enable I2C access to the Chrome OS EC. This is used on older
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ARM Chromebooks such as snow and spring before the standard bus
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changed to SPI. The EC will accept commands across the I2C using
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a special message protocol, and provide responses.
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config CROS_EC_LPC
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bool "Enable Chrome OS EC LPC driver"
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depends on CROS_EC
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help
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Enable I2C access to the Chrome OS EC. This is used on x86
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Chromebooks such as link and falco. The keyboard is provided
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through a legacy port interface, so on x86 machines the main
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function of the EC is power and thermal management.
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config CROS_EC_SPI
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bool "Enable Chrome OS EC SPI driver"
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depends on CROS_EC
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help
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Enable SPI access to the Chrome OS EC. This is used on newer
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ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
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provides a faster and more robust interface than I2C but the bugs
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are less interesting.
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config DM_CROS_EC
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bool "Enable Driver Model for Chrome OS EC"
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depends on DM
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help
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Enable driver model for the Chrome OS EC interface. This
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allows the cros_ec SPI driver to operate with CONFIG_DM_SPI
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but otherwise makes few changes. Since cros_ec also supports
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LPC (which doesn't support driver model yet), a full
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conversion is not yet possible.
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config CONFIG_FSL_SEC_MON
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bool "Enable FSL SEC_MON Driver"
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help
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Freescale Security Monitor block is responsible for monitoring
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system states.
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Security Monitor can be transitioned on any security failures,
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like software violations or hardware security violations.
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