Benoît Thébaudeau 323846561a mx5/6 clocks: Fix SDHC clocks ... The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>		2012-10-15 11:54:12 -07:00
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cpu	mx5/6 clocks: Fix SDHC clocks	2012-10-15 11:54:12 -07:00
dts	tegra: fdt: Add NAND controller binding and definitions	2012-09-07 13:54:30 -07:00
imx-common	mx5/6 clocks: Fix SDHC clocks	2012-10-15 11:54:12 -07:00
include/asm	mx5/6 clocks: Fix SDHC clocks	2012-10-15 11:54:12 -07:00
lib	serial: Remove CONFIG_SERIAL_MULTI from remaining sources	2012-10-15 11:53:59 -07:00
config.mk	arm: work around assembler bug	2012-10-04 14:19:04 +02:00