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https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
31f39b2f46
The config header for this platform disables both CMD_SF and CMD_SPI and the defconfig leaves them enabled. Disable them from the defconfig and enable them in the header. Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Tom Rini <trini@konsulko.com>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/configs/blanche.h
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* This file is blanche board configuration.
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*
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* Copyright (C) 2016 Renesas Electronics Corporation
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*/
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#ifndef __BLANCHE_H
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#define __BLANCHE_H
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#include "rcar-gen2-common.h"
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/* STACK */
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#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
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#define STACK_AREA_SIZE 0x00100000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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/* FLASH */
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#if !defined(CONFIG_MTD_NOR_FLASH)
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#define CONFIG_SH_QSPI_BASE 0xE6B10000
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#else
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_FLASH_BASE 0x00000000
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#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
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#define CONFIG_SYS_MAX_FLASH_SECT 1024
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
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#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
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#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
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#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
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#endif
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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/* ENV setting */
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#endif /* __BLANCHE_H */
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