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![Otavio Salvador](/assets/img/avatar_default.png)
Some boards cannot do voltage negotiation but need to set the VSELECT bit forcely to ensure it to work at 1.8V. This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
7 lines
284 B
Plaintext
7 lines
284 B
Plaintext
CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
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CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
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CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
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Accessing ESDHC registers can be determined by ESDHC IP's endian
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mode or processor's endian mode.
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