mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
2baf3a5584
It is observed that when enabling boot stage support, occasionally the board reboots during boot over and over again, and eventually boots to shell. This was seen on my board, but not on Jian's board. Debugging shows that the TSC timer calibration against PIT fails as boot stage APIs utilize timer in a very early stage and at that time TSC/PIT may not be stable enough for the calibration to pass. Disable it for now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Cc: Jian Luo <Jian.Luo4@boschrexroth.de> Reviewed-by: Simon Glass <sjg@chromium.org>
52 lines
1.0 KiB
Plaintext
52 lines
1.0 KiB
Plaintext
CONFIG_X86=y
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CONFIG_VENDOR_INTEL=y
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CONFIG_DEFAULT_DEVICE_TREE="crownbay"
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CONFIG_TARGET_CROWNBAY=y
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CONFIG_SMP=y
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CONFIG_MAX_CPUS=2
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CONFIG_HAVE_VGA_BIOS=y
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CONFIG_GENERATE_PIRQ_TABLE=y
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CONFIG_GENERATE_MP_TABLE=y
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CONFIG_FIT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_CPU=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_PING=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_CONTROL=y
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CONFIG_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CPU=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_GIGADEVICE=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_DM_ETH=y
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CONFIG_E1000=y
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CONFIG_PCH_GBE=y
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CONFIG_DM_PCI=y
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CONFIG_DM_RTC=y
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CONFIG_SYS_NS16550=y
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CONFIG_ICH_SPI=y
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CONFIG_TIMER=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_VIDEO_VESA=y
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CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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