mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
7c03caf6fa
Add the required CPU code so that TPL builds correctly. Also update the SPL code to deal with being booted from TPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
39 lines
975 B
C
39 lines
975 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
|
|
*/
|
|
|
|
/*
|
|
* board/config.h - configuration options, board specific
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
#include <configs/x86-common.h>
|
|
|
|
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
|
|
|
|
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \
|
|
"stdout=serial,vidconsole\0" \
|
|
"stderr=serial,vidconsole\0"
|
|
|
|
/*
|
|
* ATA/SATA support for QEMU x86 targets
|
|
* - Only legacy IDE controller is supported for QEMU '-M pc' target
|
|
* - AHCI controller is supported for QEMU '-M q35' target
|
|
*/
|
|
#define CONFIG_SYS_IDE_MAXBUS 2
|
|
#define CONFIG_SYS_IDE_MAXDEVICE 4
|
|
#define CONFIG_SYS_ATA_BASE_ADDR 0
|
|
#define CONFIG_SYS_ATA_DATA_OFFSET 0
|
|
#define CONFIG_SYS_ATA_REG_OFFSET 0
|
|
#define CONFIG_SYS_ATA_ALT_OFFSET 0
|
|
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
|
|
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
|
|
#define CONFIG_ATAPI
|
|
|
|
#define CONFIG_SPL_BOARD_LOAD_IMAGE
|
|
|
|
#endif /* __CONFIG_H */
|