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https://github.com/brain-hackers/u-boot-brain
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![Kyungmin Park](/assets/img/avatar_default.png)
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array using a NOR Flash interface. This on-chip integration enables system designers to reduce external system logic and use high-density NAND Flash in applications that would otherwise have to use more NOR components. Flex-OneNAND enables users to configure to partition it into SLC and MLC areas in more flexible way. While MLC area of Flex-OneNAND can be used to store data that require low reliability and high density, SLC area of Flex-OneNAND to store data that need high reliability and high performance. Flex-OneNAND can let users take advantage of storing these two different types of data into one chip, which is making Flex-OneNAND more cost- and space-effective. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
/*
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* (C) Copyright 2005-2008 Samsung Electronis
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/string.h>
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#include "onenand_ipl.h"
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#define onenand_block_address(block) (block)
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#define onenand_sector_address(page) (page << 2)
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#define onenand_buffer_address() ((1 << 3) << 8)
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#define onenand_bufferram_address(block) (0)
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#ifdef __HAVE_ARCH_MEMCPY32
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extern void *memcpy32(void *dest, void *src, int size);
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#endif
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/* read a page with ECC */
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static inline int onenand_read_page(ulong block, ulong page,
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u_char * buf, int pagesize)
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{
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unsigned long *base;
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#ifndef __HAVE_ARCH_MEMCPY32
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unsigned int offset, value;
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unsigned long *p;
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#endif
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onenand_writew(onenand_block_address(block),
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THIS_ONENAND(ONENAND_REG_START_ADDRESS1));
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onenand_writew(onenand_bufferram_address(block),
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THIS_ONENAND(ONENAND_REG_START_ADDRESS2));
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onenand_writew(onenand_sector_address(page),
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THIS_ONENAND(ONENAND_REG_START_ADDRESS8));
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onenand_writew(onenand_buffer_address(),
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THIS_ONENAND(ONENAND_REG_START_BUFFER));
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onenand_writew(ONENAND_INT_CLEAR, THIS_ONENAND(ONENAND_REG_INTERRUPT));
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onenand_writew(ONENAND_CMD_READ, THIS_ONENAND(ONENAND_REG_COMMAND));
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#ifndef __HAVE_ARCH_MEMCPY32
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p = (unsigned long *) buf;
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#endif
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base = (unsigned long *) (CFG_ONENAND_BASE + ONENAND_DATARAM);
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while (!(READ_INTERRUPT() & ONENAND_INT_READ))
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continue;
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#ifdef __HAVE_ARCH_MEMCPY32
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/* 32 bytes boundary memory copy */
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memcpy32(buf, base, pagesize);
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#else
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for (offset = 0; offset < (pagesize >> 2); offset++) {
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value = *(base + offset);
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*p++ = value;
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}
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#endif
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return 0;
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}
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#define ONENAND_START_PAGE 1
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#define ONENAND_PAGES_PER_BLOCK 64
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/**
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* onenand_read_block - Read a block data to buf
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* @return 0 on success
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*/
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int onenand_read_block0(unsigned char *buf)
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{
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int page, offset = 0;
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int pagesize = ONENAND_PAGE_SIZE;
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/* MLC OneNAND has 4KiB page size */
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if (onenand_readw(THIS_ONENAND(ONENAND_REG_TECHNOLOGY)))
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pagesize <<= 1;
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/* NOTE: you must read page from page 1 of block 0 */
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/* read the block page by page*/
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for (page = ONENAND_START_PAGE;
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page < ONENAND_PAGES_PER_BLOCK; page++) {
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onenand_read_page(0, page, buf + offset, pagesize);
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offset += pagesize;
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}
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return 0;
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}
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