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https://github.com/brain-hackers/u-boot-brain
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![Ajay Kumar Gupta](/assets/img/avatar_default.png)
USB0_DRVVBUS pinmux configuration is required for USB functinality in uboot. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Swaminathan S <swami.iyer@ti.com>
136 lines
3.9 KiB
C
136 lines
3.9 KiB
C
/*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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*
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* Base on code from TI. Original Notices follow:
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*
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* (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
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*
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* Modified for DA8xx EVM.
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* Parts are shamelessly stolen from various TI sources, original copyright
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* follows:
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* -----------------------------------------------------------------
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*
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* Copyright (C) 2004 Texas Instruments.
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*
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* ----------------------------------------------------------------------------
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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* ----------------------------------------------------------------------------
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*/
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#include <common.h>
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#include <i2c.h>
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include "../common/misc.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define pinmux &davinci_syscfg_regs->pinmux
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#ifdef CONFIG_SPI_FLASH
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/* SPI0 pin muxer settings */
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const struct pinmux_config spi0_pins[] = {
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{ pinmux[7], 1, 3 },
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{ pinmux[7], 1, 4 },
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{ pinmux[7], 1, 5 },
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{ pinmux[7], 1, 6 },
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{ pinmux[7], 1, 7 }
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};
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#endif
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/* UART pin muxer settings */
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const struct pinmux_config uart_pins[] = {
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{ pinmux[8], 2, 7 },
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{ pinmux[9], 2, 0 }
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};
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/* I2C pin muxer settings */
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const struct pinmux_config i2c_pins[] = {
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{ pinmux[9], 2, 3 },
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{ pinmux[9], 2, 4 }
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};
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/* USB0_DRVVBUS pin muxer settings */
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const struct pinmux_config usb_pins[] = {
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{ pinmux[9], 1, 1 }
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};
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int board_init(void)
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{
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#ifndef CONFIG_USE_IRQ
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/*
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* Mask all IRQs by clearing the global enable and setting
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* the enable clear for all the 90 interrupts.
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*/
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writel(0, &davinci_aintc_regs->ger);
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writel(0, &davinci_aintc_regs->hier);
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writel(0xffffffff, &davinci_aintc_regs->ecr1);
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writel(0xffffffff, &davinci_aintc_regs->ecr2);
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writel(0xffffffff, &davinci_aintc_regs->ecr3);
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#endif
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/*
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* Power on required peripherals
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* ARM does not have access by default to PSC0 and PSC1
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* assuming here that the DSP bootloader has set the IOPU
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* such that PSC access is available to ARM
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*/
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lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */
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lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */
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lpsc_on(DAVINCI_LPSC_EMAC); /* image download */
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lpsc_on(DAVINCI_LPSC_UART2); /* console */
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lpsc_on(DAVINCI_LPSC_GPIO);
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/* setup the SUSPSRC for ARM to control emulation suspend */
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writel(readl(&davinci_syscfg_regs->suspsrc) &
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~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
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DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
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DAVINCI_SYSCFG_SUSPSRC_UART2),
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&davinci_syscfg_regs->suspsrc);
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#ifdef CONFIG_SPI_FLASH
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if (davinci_configure_pin_mux(spi0_pins, ARRAY_SIZE(spi0_pins)) != 0)
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return 1;
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#endif
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if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0)
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return 1;
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if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0)
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return 1;
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if (davinci_configure_pin_mux(usb_pins, ARRAY_SIZE(usb_pins)) != 0)
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return 1;
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/* enable the console UART */
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writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
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DAVINCI_UART_PWREMU_MGMT_UTRST),
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&davinci_uart2_ctrl_regs->pwremu_mgmt);
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return(0);
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}
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