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https://github.com/brain-hackers/u-boot-brain
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3c945542da
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000. About USB boot tool ------------------- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
105 lines
2.1 KiB
C
105 lines
2.1 KiB
C
/*
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* Authors: Xiangfu Liu <xiangfu@sharism.cc>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 3 of the License, or (at your option) any later version.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/jz4740.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void gpio_init(void)
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{
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unsigned int i;
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/* Initialize NAND Flash Pins */
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__gpio_as_nand();
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/* Initialize SDRAM pins */
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__gpio_as_sdram_16bit_4720();
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/* Initialize LCD pins */
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__gpio_as_lcd_18bit();
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/* Initialize MSC pins */
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__gpio_as_msc();
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/* Initialize Other pins */
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for (i = 0; i < 7; i++) {
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__gpio_as_input(GPIO_KEYIN_BASE + i);
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__gpio_enable_pull(GPIO_KEYIN_BASE + i);
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}
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for (i = 0; i < 8; i++) {
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__gpio_as_output(GPIO_KEYOUT_BASE + i);
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__gpio_clear_pin(GPIO_KEYOUT_BASE + i);
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}
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__gpio_as_input(GPIO_KEYIN_8);
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__gpio_enable_pull(GPIO_KEYIN_8);
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/* enable the TP4, TP5 as UART0 */
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__gpio_jtag_to_uart0();
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__gpio_as_output(GPIO_AUDIO_POP);
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__gpio_set_pin(GPIO_AUDIO_POP);
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__gpio_as_output(GPIO_LCD_CS);
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__gpio_clear_pin(GPIO_LCD_CS);
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__gpio_as_output(GPIO_AMP_EN);
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__gpio_clear_pin(GPIO_AMP_EN);
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__gpio_as_output(GPIO_SDPW_EN);
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__gpio_disable_pull(GPIO_SDPW_EN);
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__gpio_clear_pin(GPIO_SDPW_EN);
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__gpio_as_input(GPIO_SD_DETECT);
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__gpio_disable_pull(GPIO_SD_DETECT);
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__gpio_as_input(GPIO_USB_DETECT);
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__gpio_enable_pull(GPIO_USB_DETECT);
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}
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static void cpm_init(void)
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{
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struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
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uint32_t reg = readw(&cpm->clkgr);
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reg |= CPM_CLKGR_IPU |
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CPM_CLKGR_CIM |
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CPM_CLKGR_I2C |
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CPM_CLKGR_SSI |
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CPM_CLKGR_UART1 |
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CPM_CLKGR_SADC |
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CPM_CLKGR_UHC |
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CPM_CLKGR_UDC |
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CPM_CLKGR_AIC1;
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writew(reg, &cpm->clkgr);
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}
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int board_early_init_f(void)
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{
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gpio_init();
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cpm_init();
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calc_clocks(); /* calc the clocks */
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rtc_init(); /* init rtc on any reset */
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return 0;
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}
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/* U-Boot common routines */
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int checkboard(void)
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{
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printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %ld MHz)\n",
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gd->cpu_clk / 1000000);
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return 0;
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}
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