mirror of
https://github.com/brain-hackers/u-boot-brain
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588 lines
15 KiB
C
588 lines
15 KiB
C
/*
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* (C) Copyright 2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* flash_real_protect() routine based on boards/alaska/flash.c
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* (C) Copyright 2001
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/* Intel-compatible flash commands */
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#define INTEL_ERASE 0x20
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#define INTEL_PROGRAM 0x40
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#define INTEL_CLEAR 0x50
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#define INTEL_LOCKBIT 0x60
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#define INTEL_PROTECT 0x01
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#define INTEL_STATUS 0x70
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#define INTEL_READID 0x90
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#define INTEL_READID 0x90
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#define INTEL_SUSPEND 0xB0
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#define INTEL_CONFIRM 0xD0
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#define INTEL_RESET 0xFF
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/* Intel-compatible flash status bits */
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#define INTEL_FINISHED 0x80
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#define INTEL_OK 0x80
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typedef unsigned char FLASH_PORT_WIDTH;
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typedef volatile unsigned char FLASH_PORT_WIDTHV;
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define FLASH_ID_MASK 0xFF
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#define ORMASK(size) ((-size) & OR_AM_MSK)
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE2 0x02aa
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(FPWV *addr, flash_info_t *info);
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static void flash_reset(flash_info_t *info);
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static flash_info_t *flash_get_info(ulong base);
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static int write_data (flash_info_t *info, FPWV *dest, FPW data); /* O2D */
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static void flash_sync_real_protect (flash_info_t * info);
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
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/*-----------------------------------------------------------------------
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* flash_init()
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*
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* sets up flash_info and returns size of FLASH (bytes)
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*/
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unsigned long flash_init (void)
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{
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unsigned long size = 0;
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int i;
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extern void flash_preinit(void);
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extern void flash_afterinit(ulong);
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flash_preinit();
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/* Init: no FLASHes known */
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for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
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memset(&flash_info[i], 0, sizeof(flash_info_t));
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flash_info[i].flash_id = FLASH_UNKNOWN;
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}
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/* Query flash chip */
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flash_info[0].size =
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flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]);
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size += flash_info[0].size;
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/* get the h/w and s/w protection status in sync */
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flash_sync_real_protect(&flash_info[0]);
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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flash_get_info(CFG_MONITOR_BASE));
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#endif
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SIZE-1,
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flash_get_info(CFG_ENV_ADDR));
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#endif
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flash_afterinit(size);
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return (size ? size : 1);
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_reset(flash_info_t *info)
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{
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FPWV *base = (FPWV *)(info->start[0]);
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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*base = (FPW) INTEL_RESET; /* Intel Read Mode */
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}
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/*-----------------------------------------------------------------------
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*/
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static flash_info_t *flash_get_info(ulong base)
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{
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int i;
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flash_info_t * info;
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
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info = & flash_info[i];
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if (info->size &&
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info->start[0] <= base &&
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base <= info->start[0] + info->size - 1)
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break;
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}
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return (i == CFG_MAX_FLASH_BANKS ? 0 : info);
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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uchar *boottype;
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uchar *bootletter;
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char *fmt;
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uchar botbootletter[] = "B";
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uchar topbootletter[] = "T";
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uchar botboottype[] = "bottom boot sector";
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uchar topboottype[] = "top boot sector";
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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printf ("INTEL ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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/* check for top or bottom boot, if it applies */
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if (info->flash_id & FLASH_BTYPE) {
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boottype = botboottype;
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bootletter = botbootletter;
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} else {
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boottype = topboottype;
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bootletter = topbootletter;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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fmt = "28F128J3 (128 Mbit, uniform sectors)\n";
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break;
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default:
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fmt = "Unknown Chip Type\n";
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break;
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}
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printf (fmt, bootletter, boottype);
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20,
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info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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}
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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ulong flash_get_size (FPWV *addr, flash_info_t *info)
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{
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int i;
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command sequence and test FLASH answer */
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addr[FLASH_CYCLE1] = (FPW) INTEL_READID; /* selects Intel or AMD */
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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* This works for any bus width and any FLASH device width.
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*/
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udelay(100);
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switch (addr[0] & 0xff) {
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case (uchar)INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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}
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/* Strataflash is configurable to 8/16bit Bus,
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* but the Query-Structure is Word-orientated */
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if (info->flash_id != FLASH_UNKNOWN) {
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switch ((FPW)addr[2]) {
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case (FPW)INTEL_ID_28F128J3:
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info->flash_id += FLASH_28F128J3A;
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info->sector_count = 128;
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info->size = 0x01000000;
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for( i = 0; i < info->sector_count; i++ )
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info->start[i] = (ulong)addr + (i * 0x20000);
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break; /* => Intel Strataflash 16MB */
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default:
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printf("Flash_id != %xd\n", (FPW)addr[2]);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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return (0); /* => no or unknown flash */
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}
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}
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/* Put FLASH back in read mode */
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flash_reset(info);
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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FPWV *addr;
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int flag, prot, sect;
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ulong start, now, last;
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int rcode = 0;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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break;
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case FLASH_UNKNOWN:
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default:
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect)
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if (info->protect[sect])
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prot++;
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if (prot)
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printf ("- Warning: %d protected sectors will not be erased!",
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prot);
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printf ("\n");
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last = get_timer(0);
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last && rcode == 0; sect++) {
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if (info->protect[sect] != 0) /* protected, skip it */
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continue;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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addr = (FPWV *)(info->start[sect]);
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*addr = (FPW) INTEL_CLEAR; /* clear status register */
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*addr = (FPW) INTEL_ERASE; /* erase setup */
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*addr = (FPW) INTEL_CONFIRM; /* erase confirm */
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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start = get_timer(0);
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/* wait at least 80us for Intel - let's wait 1 ms */
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udelay (1000);
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while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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*addr = (FPW) INTEL_SUSPEND;/* suspend erase */
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flash_reset(info); /* reset to read mode */
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rcode = 1; /* failed */
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break;
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}
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/* show that we're waiting */
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if ((get_timer(last)) > CFG_HZ) { /* every second */
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putc ('.');
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last = get_timer(0);
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}
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}
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flash_reset(info); /* reset to read mode */
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}
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printf (" done\n");
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return rcode;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
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int bytes; /* number of bytes to program in current word */
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int left; /* number of bytes left to program */
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int i, res;
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for (left = cnt, res = 0;
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left > 0 && res == 0;
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addr += sizeof(data), left -= sizeof(data) - bytes) {
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bytes = addr & (sizeof(data) - 1);
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addr &= ~(sizeof(data) - 1);
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/* combine source and destination data so can program
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* an entire word of 16 or 32 bits */
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for (i = 0; i < sizeof(data); i++) {
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data <<= 8;
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if (i < bytes || i - bytes >= left )
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data += *((uchar *)addr + i);
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else
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data += *src++;
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}
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/* write one word to the flash */
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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res = write_data(info, (FPWV *)addr, data);
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break;
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default:
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/* unknown flash type, error! */
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printf ("missing or unknown FLASH type\n");
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res = 1; /* not really a timeout, but gives error */
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break;
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}
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}
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return (res);
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}
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/*-----------------------------------------------------------------------
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* Write a word or halfword to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_data (flash_info_t *info, FPWV *dest, FPW data)
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{
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FPWV *addr = dest;
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ulong status;
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ulong start;
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int flag;
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) {
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printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
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return (2);
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}
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts ();
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*addr = (FPW) INTEL_PROGRAM; /* write setup */
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*addr = data;
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/* arm simple, non interrupt dependent timer */
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start = get_timer(0);
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/* wait while polling the status register */
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while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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return (1);
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}
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}
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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if (flag)
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enable_interrupts();
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return (0);
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}
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/*-----------------------------------------------------------------------
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* Set/Clear sector's lock bit, returns:
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* 0 - OK
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* 1 - Error (timeout, voltage problems, etc.)
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*/
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int flash_real_protect (flash_info_t * info, long sector, int prot)
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{
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ulong start;
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int i;
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int rc = 0;
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FPWV *addr = (FPWV *) (info->start[sector]);
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int flag = disable_interrupts ();
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*addr = INTEL_CLEAR; /* Clear status register */
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if (prot) { /* Set sector lock bit */
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*addr = INTEL_LOCKBIT; /* Sector lock bit */
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*addr = INTEL_PROTECT; /* set */
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} else { /* Clear sector lock bit */
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*addr = INTEL_LOCKBIT; /* All sectors lock bits */
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*addr = INTEL_CONFIRM; /* clear */
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}
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start = get_timer (0);
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while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
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if (get_timer (start) > CFG_FLASH_UNLOCK_TOUT) {
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printf ("Flash lock bit operation timed out\n");
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rc = 1;
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break;
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}
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}
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if (*addr != INTEL_OK) {
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printf ("Flash lock bit operation failed at %08X, CSR=%08X\n",
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(uint) addr, (uint) * addr);
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rc = 1;
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}
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if (!rc)
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info->protect[sector] = prot;
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/*
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* Clear lock bit command clears all sectors lock bits, so
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* we have to restore lock bits of protected sectors.
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*/
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if (!prot) {
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for (i = 0; i < info->sector_count; i++) {
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if (info->protect[i]) {
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start = get_timer (0);
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addr = (FPWV *) (info->start[i]);
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*addr = INTEL_LOCKBIT; /* Sector lock bit */
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*addr = INTEL_PROTECT; /* set */
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while ((*addr & INTEL_FINISHED) !=
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INTEL_FINISHED) {
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if (get_timer (start) >
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CFG_FLASH_UNLOCK_TOUT) {
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printf ("Flash lock bit operation timed out\n");
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rc = 1;
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break;
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}
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}
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}
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}
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}
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if (flag)
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enable_interrupts ();
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*addr = INTEL_RESET; /* Reset to read array mode */
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return rc;
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}
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/*
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* This function gets the u-boot flash sector protection status
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* (flash_info_t.protect[]) in sync with the sector protection
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* status stored in hardware.
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*/
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static void flash_sync_real_protect (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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for (i = 0; i < info->sector_count; ++i) {
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info->protect[i] = intel_sector_protected(info, i);
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}
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break;
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default:
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/* no h/w protect support */
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break;
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}
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}
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/*
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* checks if "sector" in bank "info" is protected. Should work on intel
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* strata flash chips 28FxxxJ3x in 8-bit mode.
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* Returns 1 if sector is protected (or timed-out while trying to read
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* protection status), 0 if it is not.
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*/
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
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{
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FPWV *addr;
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FPWV *lock_conf_addr;
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ulong start;
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unsigned char ret;
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/*
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* first, wait for the WSM to be finished. The rationale for
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* waiting for the WSM to become idle for at most
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* CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
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* because of: (1) erase, (2) program or (3) lock bit
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* configuration. So we just wait for the longest timeout of
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* the (1)-(3), i.e. the erase timeout.
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*/
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/* wait at least 35ns (W12) before issuing Read Status Register */
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udelay(1);
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addr = (FPWV *) info->start[sector];
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*addr = (FPW) INTEL_STATUS;
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start = get_timer (0);
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while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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printf("WSM busy too long, can't get prot status\n");
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return 1;
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}
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}
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/* issue the Read Identifier Codes command */
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*addr = (FPW) INTEL_READID;
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/* wait at least 35ns (W12) before reading */
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udelay(1);
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/* Intel example code uses offset of 4 for 8-bit flash */
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lock_conf_addr = (FPWV *) info->start[sector] + 4;
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ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
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/* put flash back in read mode */
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*addr = (FPW) INTEL_RESET;
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return ret;
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}
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