35 lines
904 B
C
35 lines
904 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#ifndef __AXG_H__
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#define __AXG_H__
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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#define AXG_AOBUS_BASE 0xff800000
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#define AXG_PERIPHS_BASE 0xff634400
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#define AXG_HIU_BASE 0xff63c000
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#define AXG_ETH_BASE 0xff3f0000
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/* Always-On Peripherals registers */
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#define AXG_AO_ADDR(off) (AXG_AOBUS_BASE + ((off) << 2))
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#define AXG_AO_SEC_GP_CFG0 AXG_AO_ADDR(0x90)
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#define AXG_AO_SEC_GP_CFG3 AXG_AO_ADDR(0x93)
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#define AXG_AO_SEC_GP_CFG4 AXG_AO_ADDR(0x94)
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#define AXG_AO_SEC_GP_CFG5 AXG_AO_ADDR(0x95)
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#define AXG_AO_BOOT_DEVICE 0xF
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#define AXG_AO_MEM_SIZE_MASK 0xFFFF0000
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#define AXG_AO_MEM_SIZE_SHIFT 16
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#define AXG_AO_BL31_RSVMEM_SIZE_MASK 0xFFFF0000
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#define AXG_AO_BL31_RSVMEM_SIZE_SHIFT 16
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#define AXG_AO_BL32_RSVMEM_SIZE_MASK 0xFFFF
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#endif /* __AXG_H__ */
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