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2f721d1733
The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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| .. | ||
| ali512x.c | ||
| ds4510.c | ||
| fsl_law.c | ||
| fsl_pmic.c | ||
| gpio_led.c | ||
| Makefile | ||
| ns87308.c | ||
| status_led.c | ||
| twl4030_led.c | ||