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https://github.com/brain-hackers/u-boot-brain
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2e5ba48928
Adding the correct configurations required for dplls, clocks, for omap5 Soc. Also changes are done to retain some part of the code common for OMAP4/5 and move only the remaining to the Soc specific directories. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
121 lines
3.5 KiB
C
121 lines
3.5 KiB
C
/*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <asm/arch/omap.h>
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#include <asm/io.h>
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#include <asm/arch/clocks.h>
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#include <asm/omap_common.h>
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#include <asm/arch/mux_omap5.h>
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#include <asm/arch/clocks.h>
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struct omap_sysinfo {
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char *board_string;
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};
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extern const struct omap_sysinfo sysinfo;
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void gpmc_init(void);
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void watchdog_init(void);
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u32 get_device_type(void);
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void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
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void set_muxconf_regs_essential(void);
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void set_muxconf_regs_non_essential(void);
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void sr32(void *, u32, u32, u32);
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u32 wait_on_value(u32, u32, void *, u32);
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void sdelay(unsigned long);
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void omap_rev_string(char *omap_rev_string);
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void setup_clocks_for_console(void);
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void prcm_init(void);
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void bypass_dpll(u32 *const base);
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void freq_update_core(void);
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u32 get_sys_clk_freq(void);
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u32 omap5_ddr_clk(void);
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void cancel_out(u32 *num, u32 *den, u32 den_limit);
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void sdram_init(void);
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u32 omap_sdram_size(void);
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u32 cortex_rev(void);
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void init_omap_revision(void);
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void do_io_settings(void);
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/*
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* This is used to verify if the configuration header
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* was executed by Romcode prior to control of transfer
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* to the bootloader. SPL is responsible for saving and
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* passing this to the u-boot.
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*/
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extern struct omap_boot_parameters boot_params;
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static inline u32 running_from_sdram(void)
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{
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u32 pc;
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asm volatile ("mov %0, pc" : "=r" (pc));
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return ((pc >= OMAP54XX_DRAM_ADDR_SPACE_START) &&
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(pc < OMAP54XX_DRAM_ADDR_SPACE_END));
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}
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static inline u8 uboot_loaded_by_spl(void)
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{
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/*
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* Configuration Header is not supported yet, so u-boot init running
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* from SDRAM implies that it was loaded by SPL. When this situation
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* changes one of these approaches could be taken:
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* i. Pass a magic from SPL to U-Boot and U-Boot save it at a known
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* location.
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* ii. Check the OPP. CH can support only 50% OPP while SPL initializes
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* the DPLLs at 100% OPP.
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*/
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return running_from_sdram();
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}
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/*
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* The basic hardware init of OMAP(s_init()) can happen in 4
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* different contexts:
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* 1. SPL running from SRAM
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* 2. U-Boot running from FLASH
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* 3. Non-XIP U-Boot loaded to SDRAM by SPL
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* 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
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* Configuration Header feature
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*
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* This function finds this context.
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* Defining as inline may help in compiling out unused functions in SPL
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*/
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static inline u32 omap_hw_init_context(void)
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{
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#ifdef CONFIG_SPL_BUILD
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return OMAP_INIT_CONTEXT_SPL;
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#else
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if (uboot_loaded_by_spl())
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return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL;
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else if (running_from_sdram())
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return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH;
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else
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return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR;
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#endif
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}
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static inline u32 omap_revision(void)
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{
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extern u32 *const omap5_revision;
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return *omap5_revision;
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}
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#endif
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