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https://github.com/brain-hackers/u-boot-brain
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![Piotr Wilczek](/assets/img/avatar_default.png)
The checkboard function's implementation is common for all DT supporting boards and should be placed in the board common file. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Chander Kashyap <k.chander@samsung.com> Cc: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Cc: Amar <amarendra.xt@samsung.com> Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
145 lines
2.7 KiB
C
145 lines
2.7 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <i2c.h>
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#include <lcd.h>
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#include <spi.h>
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#include <asm/arch/board.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/dp_info.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_USB_EHCI_EXYNOS
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static int board_usb_vbus_init(void)
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{
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struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
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samsung_get_base_gpio_part1();
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/* Enable VBUS power switch */
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s5p_gpio_direction_output(&gpio1->x2, 6, 1);
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/* VBUS turn ON time */
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mdelay(3);
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return 0;
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}
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#endif
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int exynos_init(void)
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{
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#ifdef CONFIG_USB_EHCI_EXYNOS
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board_usb_vbus_init();
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#endif
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return 0;
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}
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#ifdef CONFIG_LCD
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void cfg_lcd_gpio(void)
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{
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struct exynos5_gpio_part1 *gpio1 =
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(struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
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/* For Backlight */
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s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
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s5p_gpio_set_value(&gpio1->b2, 0, 1);
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/* LCD power on */
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s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
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s5p_gpio_set_value(&gpio1->x1, 5, 1);
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/* Set Hotplug detect for DP */
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s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
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}
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vidinfo_t panel_info = {
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.vl_freq = 60,
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.vl_col = 2560,
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.vl_row = 1600,
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.vl_width = 2560,
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.vl_height = 1600,
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.vl_clkp = CONFIG_SYS_LOW,
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.vl_hsp = CONFIG_SYS_LOW,
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.vl_vsp = CONFIG_SYS_LOW,
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.vl_dp = CONFIG_SYS_LOW,
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.vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
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/* wDP panel timing infomation */
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.vl_hspw = 32,
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.vl_hbpd = 80,
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.vl_hfpd = 48,
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.vl_vspw = 6,
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.vl_vbpd = 37,
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.vl_vfpd = 3,
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.vl_cmd_allow_len = 0xf,
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.win_id = 3,
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.cfg_gpio = cfg_lcd_gpio,
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.backlight_on = NULL,
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.lcd_power_on = NULL,
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.reset_lcd = NULL,
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.dual_lcd_enabled = 0,
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.init_delay = 0,
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.power_on_delay = 0,
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.reset_delay = 0,
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.interface_mode = FIMD_RGB_INTERFACE,
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.dp_enabled = 1,
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};
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static struct edp_device_info edp_info = {
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.disp_info = {
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.h_res = 2560,
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.h_sync_width = 32,
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.h_back_porch = 80,
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.h_front_porch = 48,
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.v_res = 1600,
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.v_sync_width = 6,
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.v_back_porch = 37,
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.v_front_porch = 3,
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.v_sync_rate = 60,
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},
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.lt_info = {
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.lt_status = DP_LT_NONE,
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},
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.video_info = {
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.master_mode = 0,
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.bist_mode = DP_DISABLE,
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.bist_pattern = NO_PATTERN,
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.h_sync_polarity = 0,
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.v_sync_polarity = 0,
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.interlaced = 0,
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.color_space = COLOR_RGB,
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.dynamic_range = VESA,
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.ycbcr_coeff = COLOR_YCBCR601,
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.color_depth = COLOR_8,
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},
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};
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static struct exynos_dp_platform_data dp_platform_data = {
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.phy_enable = set_dp_phy_ctrl,
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.edp_dev_info = &edp_info,
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};
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void init_panel_info(vidinfo_t *vid)
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{
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vid->rgb_mode = MODE_RGB_P;
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exynos_set_dp_platform_data(&dp_platform_data);
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}
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#endif
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int board_get_revision(void)
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{
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return 0;
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}
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