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https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
134 lines
4.7 KiB
C
134 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Freescale i.MX28 RTC Register Definitions
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*/
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#ifndef __MX28_REGS_RTC_H__
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#define __MX28_REGS_RTC_H__
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#include <asm/mach-imx/regs-common.h>
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#ifndef __ASSEMBLY__
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struct mxs_rtc_regs {
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mxs_reg_32(hw_rtc_ctrl)
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mxs_reg_32(hw_rtc_stat)
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mxs_reg_32(hw_rtc_milliseconds)
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mxs_reg_32(hw_rtc_seconds)
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mxs_reg_32(hw_rtc_rtc_alarm)
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mxs_reg_32(hw_rtc_watchdog)
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mxs_reg_32(hw_rtc_persistent0)
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mxs_reg_32(hw_rtc_persistent1)
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mxs_reg_32(hw_rtc_persistent2)
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mxs_reg_32(hw_rtc_persistent3)
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mxs_reg_32(hw_rtc_persistent4)
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mxs_reg_32(hw_rtc_persistent5)
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mxs_reg_32(hw_rtc_debug)
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mxs_reg_32(hw_rtc_version)
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};
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#endif
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#define RTC_CTRL_SFTRST (1 << 31)
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#define RTC_CTRL_CLKGATE (1 << 30)
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#define RTC_CTRL_SUPPRESS_COPY2ANALOG (1 << 6)
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#define RTC_CTRL_FORCE_UPDATE (1 << 5)
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#define RTC_CTRL_WATCHDOGEN (1 << 4)
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#define RTC_CTRL_ONEMSEC_IRQ (1 << 3)
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#define RTC_CTRL_ALARM_IRQ (1 << 2)
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#define RTC_CTRL_ONEMSEC_IRQ_EN (1 << 1)
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#define RTC_CTRL_ALARM_IRQ_EN (1 << 0)
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#define RTC_STAT_RTC_PRESENT (1 << 31)
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#define RTC_STAT_ALARM_PRESENT (1 << 30)
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#define RTC_STAT_WATCHDOG_PRESENT (1 << 29)
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#define RTC_STAT_XTAL32000_PRESENT (1 << 28)
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#define RTC_STAT_XTAL32768_PRESENT (1 << 27)
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#define RTC_STAT_STALE_REGS_MASK (0xff << 16)
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#define RTC_STAT_STALE_REGS_OFFSET 16
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#define RTC_STAT_NEW_REGS_MASK (0xff << 8)
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#define RTC_STAT_NEW_REGS_OFFSET 8
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#define RTC_MILLISECONDS_COUNT_MASK 0xffffffff
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#define RTC_MILLISECONDS_COUNT_OFFSET 0
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#define RTC_SECONDS_COUNT_MASK 0xffffffff
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#define RTC_SECONDS_COUNT_OFFSET 0
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#define RTC_ALARM_VALUE_MASK 0xffffffff
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#define RTC_ALARM_VALUE_OFFSET 0
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#define RTC_WATCHDOG_COUNT_MASK 0xffffffff
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#define RTC_WATCHDOG_COUNT_OFFSET 0
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_MASK (0xf << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_OFFSET 28
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V83 (0x0 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V78 (0x1 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V73 (0x2 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V68 (0x3 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V62 (0x4 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V57 (0x5 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V52 (0x6 << 28)
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#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V48 (0x7 << 28)
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#define RTC_PERSISTENT0_EXTERNAL_RESET (1 << 21)
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#define RTC_PERSISTENT0_THERMAL_RESET (1 << 20)
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#define RTC_PERSISTENT0_ENABLE_LRADC_PWRUP (1 << 18)
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#define RTC_PERSISTENT0_AUTO_RESTART (1 << 17)
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#define RTC_PERSISTENT0_DISABLE_PSWITCH (1 << 16)
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#define RTC_PERSISTENT0_LOWERBIAS_MASK (0xf << 14)
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#define RTC_PERSISTENT0_LOWERBIAS_OFFSET 14
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#define RTC_PERSISTENT0_LOWERBIAS_NOMINAL (0x0 << 14)
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#define RTC_PERSISTENT0_LOWERBIAS_M25P (0x1 << 14)
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#define RTC_PERSISTENT0_LOWERBIAS_M50P (0x3 << 14)
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#define RTC_PERSISTENT0_DISABLE_XTALOK (1 << 13)
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#define RTC_PERSISTENT0_MSEC_RES_MASK (0x1f << 8)
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#define RTC_PERSISTENT0_MSEC_RES_OFFSET 8
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#define RTC_PERSISTENT0_MSEC_RES_1MS (0x01 << 8)
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#define RTC_PERSISTENT0_MSEC_RES_2MS (0x02 << 8)
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#define RTC_PERSISTENT0_MSEC_RES_4MS (0x04 << 8)
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#define RTC_PERSISTENT0_MSEC_RES_8MS (0x08 << 8)
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#define RTC_PERSISTENT0_MSEC_RES_16MS (0x10 << 8)
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#define RTC_PERSISTENT0_ALARM_WAKE (1 << 7)
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#define RTC_PERSISTENT0_XTAL32_FREQ (1 << 6)
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#define RTC_PERSISTENT0_XTAL32KHZ_PWRUP (1 << 5)
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#define RTC_PERSISTENT0_XTAL24KHZ_PWRUP (1 << 4)
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#define RTC_PERSISTENT0_LCK_SECS (1 << 3)
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#define RTC_PERSISTENT0_ALARM_EN (1 << 2)
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#define RTC_PERSISTENT0_ALARM_WAKE_EN (1 << 1)
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#define RTC_PERSISTENT0_CLOCKSOURCE (1 << 0)
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#define RTC_PERSISTENT1_GENERAL_MASK 0xffffffff
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#define RTC_PERSISTENT1_GENERAL_OFFSET 0
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#define RTC_PERSISTENT1_GENERAL_OTG_ALT_ROLE 0x0080
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#define RTC_PERSISTENT1_GENERAL_OTG_HNP 0x0100
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#define RTC_PERSISTENT1_GENERAL_USB_LPM 0x0200
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#define RTC_PERSISTENT1_GENERAL_SKIP_CHECKDISK 0x0400
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#define RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER 0x0800
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#define RTC_PERSISTENT1_GENERAL_ENUM_500MA_2X 0x1000
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#define RTC_PERSISTENT2_GENERAL_MASK 0xffffffff
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#define RTC_PERSISTENT2_GENERAL_OFFSET 0
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#define RTC_PERSISTENT3_GENERAL_MASK 0xffffffff
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#define RTC_PERSISTENT3_GENERAL_OFFSET 0
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#define RTC_PERSISTENT4_GENERAL_MASK 0xffffffff
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#define RTC_PERSISTENT4_GENERAL_OFFSET 0
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#define RTC_PERSISTENT5_GENERAL_MASK 0xffffffff
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#define RTC_PERSISTENT5_GENERAL_OFFSET 0
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#define RTC_DEBUG_WATCHDOG_RESET_MASK (1 << 1)
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#define RTC_DEBUG_WATCHDOG_RESET (1 << 0)
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#define RTC_VERSION_MAJOR_MASK (0xff << 24)
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#define RTC_VERSION_MAJOR_OFFSET 24
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#define RTC_VERSION_MINOR_MASK (0xff << 16)
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#define RTC_VERSION_MINOR_OFFSET 16
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#define RTC_VERSION_STEP_MASK 0xffff
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#define RTC_VERSION_STEP_OFFSET 0
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#endif /* __MX28_REGS_RTC_H__ */
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